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2011 Fiscal Year Final Research Report

Automatic Synthesis Method of High-Performance, Area-Efficient and Programmable Hardware

Research Project

  • PDF
Project/Area Number 22760245
Research Category

Grant-in-Aid for Young Scientists (B)

Allocation TypeSingle-year Grants
Research Field Electron device/Electronic equipment
Research InstitutionThe University of Tokyo

Principal Investigator

YOSHIDA Hiroaki  東京大学, 大規模集積システム設計教育研究センター, 特任助教 (10456163)

Project Period (FY) 2010 – 2011
Keywords電力効率 / 製造後機能修正 / Engineering Change Order(ECO) / 高位合成
Research Abstract

With the shorter time-to-market and the rising cost in SoC development, the demand for post-silicon programmability has been increasing. This research proposed a highly energy-efficient accelerator which enables post-silicon engineering change by a control patching mechanism. Then, this research proposed a patch compilation method from a given pair of an original design and a modified design. Experimental results demonstrated that the proposed accelerators offered high energy efficiency competitive to fixed-function accelerators and can achieve about 5X higher efficiency than the existing programmable accelerators.

  • Research Products

    (8 results)

All 2012 2011 2010

All Presentation (6 results) Patent(Industrial Property Rights) (2 results) (of which Overseas: 1 results)

  • [Presentation] An Energy-Efficient Patchable Accelerator For Post-Silicon Engineering Changes2011

    • Author(s)
      Hiroaki Yoshida and Masahiro Fujita
    • Organizer
      IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis(CODES+ISSS)
    • Year and Date
      20111100
  • [Presentation] A Highly Energy-Efficient Accelerator Enabling Post-Silicon Engineering Changes and Its Patch Compilation Method2011

    • Author(s)
      Hiroaki Yoshida and Masahiro Fujita
    • Organizer
      Work-In-Progress Session, ACM/IEEE Design Automation Conference(DAC)
    • Year and Date
      20110600
  • [Presentation] インクリメンタル高位合成に向けた設計記述間差分の計算手法2011

    • Author(s)
      吉田浩章,藤田昌宏
    • Organizer
      情報処理学会研究報告
    • Year and Date
      20110300
  • [Presentation] 仮想マルチプロセッサモデルに基づく高速SoCプロトタイピング手法2010

    • Author(s)
      吉田浩章,藤田昌宏
    • Organizer
      電子情報通信学会技術研究報告
    • Year and Date
      20101100
  • [Presentation] 動的パッチ読み出し機構を備えた製造後機能修正可能アクセラレータ2010

    • Author(s)
      吉田浩章,藤田昌宏
    • Organizer
      情報処理学会研究報告
    • Year and Date
      20101000
  • [Presentation] 製造後機能修正可能な高電力効率アクセラレータの高位設計手法2010

    • Author(s)
      吉田浩章,藤田昌宏
    • Organizer
      情報処理学会DAシンポジウム2010論文集
    • Year and Date
      20100900
  • [Patent(Industrial Property Rights)] Accelerator and data processing method2012

    • Inventor(s)
      吉田浩章,藤田昌宏
    • Industrial Property Rights Holder
      東京大学
    • Industrial Property Number
      特許、U. S. Patent Application 61/446208
    • Filing Date
      2012-02-23
    • Overseas
  • [Patent(Industrial Property Rights)] アクセラレータ及びデータ処理方法2010

    • Inventor(s)
      吉田浩章,藤田昌宏
    • Industrial Property Rights Holder
      東京大学
    • Industrial Property Number
      特許、特願2010-193136
    • Filing Date
      2010-08-31

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Published: 2013-07-31  

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