• Search Research Projects
  • Search Researchers
  • How to Use
  1. Back to project page

2013 Fiscal Year Final Research Report

Study on Linearity Enhancement and Its Implementation in Stochastic Signal Detection

Research Project

  • PDF
Project/Area Number 23360155
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section一般
Research Field Electron device/Electronic equipment
Research InstitutionOsaka University

Principal Investigator

MATSUOKA TOSHIMASA  大阪大学, 工学(系)研究科(研究院), 准教授 (80324820)

Project Period (FY) 2011-04-01 – 2014-03-31
Keywords確率共鳴
Research Abstract

Demand for small-size light-weight multi-functional high-performance wireless communication systems requires small-size high-speed low-power CMOS integrated circuits. To realize them, break-through for limitation in design approaches based on conventional A/D converters is important. In this study, as a step for stochastic signal detection seen in some creatures' sensory organs, linearity improvement of stochastic A/D converter was investigated. Concretely, by controlling distribution of comparators' offsets on purpose, nonlinearity originating from the offset's distribution was found to be reduced. In addition, as an application of stochastic A/D conversion, it was revealed that quantization based on the stochastic A/D converter can compensate error of internal D/A converter in a multi-bit Delta-Sigma modulator.

  • Research Products

    (7 results)

All 2013 2012 2011 Other

All Journal Article (2 results) (of which Peer Reviewed: 1 results) Presentation (3 results) Remarks (1 results) Patent(Industrial Property Rights) (1 results)

  • [Journal Article] Design of a High-Speed-Sampling Stochastic Flash Analog-to-Digital Converter Utilizing Device Mismatch2013

    • Author(s)
      H. Ham, T. Matsuoka, J. Wang, and K. Taniguchi
    • Journal Title

      Electronics and Communications in Japan

      Volume: Vol. 96,No. 1 Pages: 51-62

    • DOI

      10.1002/ecj.11411

  • [Journal Article] 素子特性ミスマッチを用いた並列型確率A-D コンバータ2011

    • Author(s)
      ハム ヒョンジュ, 松岡俊匡, 王軍, 谷口研二
    • Journal Title

      電気学会論文誌C

      Volume: Vol. 131-C,No. 11 Pages: 1848-1857

    • DOI

      10.1541/ieejeiss.131.1848

    • Peer Reviewed
  • [Presentation] マルチビットΔΣ変調器における確率的量子化器によるDAC 誤差補正2013

    • Author(s)
      平井雄作, 矢野 新也, 松岡 俊匡
    • Organizer
      電気学会電子回路研究会
    • Place of Presentation
      奈良
    • Year and Date
      20131003-04
  • [Presentation] 非線形成分補正機能を有した確率的並列型A/D 変換器の設計2012

    • Author(s)
      矢野 新也, ハム ヒョンジュ, 松岡 俊匡, 王 軍, チョウ イキュン
    • Organizer
      電子情報通信学会集積回路研究会
    • Place of Presentation
      盛岡
    • Year and Date
      20121018-19
  • [Presentation] Stochastic Flash A-D コンバータの非線形成分補正の検討2011

    • Author(s)
      矢野 新也, ハム ヒョンジュ, 松岡 俊匡
    • Organizer
      平成23年電気関係学会関西支部連合大会
    • Place of Presentation
      姫路
    • Year and Date
      20111029-30
  • [Remarks]

    • URL

      http://www.si.eei.eng.osaka-u.ac.jp/

  • [Patent(Industrial Property Rights)] ΔΣA/D 変換装置2013

    • Inventor(s)
      松岡俊匡, 平井雄作
    • Industrial Property Rights Holder
      株式会社半導体理工学研究センター
    • Industrial Property Rights Type
      特許
    • Industrial Property Number
      特願2013-098617
    • Filing Date
      2013-05-08

URL: 

Published: 2015-06-25  

Information User Guide FAQ News Terms of Use Attribution of KAKENHI

Powered by NII kakenhi