2023 Fiscal Year Research-status Report
Development and understanding of vertical Ge/TMDC TFET
| Project/Area Number |
23K13361
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| Research Institution | Chiba University |
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Principal Investigator |
柯 夢南 千葉大学, 大学院工学研究院, 助教 (40849402)
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| Project Period (FY) |
2023-04-01 – 2025-03-31
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| Keywords | 半導体デバイス / トンネル効果 / トランジスタ / ゲルマニウム / 二次元材料 |
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| Outline of Annual Research Achievements |
With the advancement of AI and IoT technologies, there is a growing demand for further low-voltage and low-power FET technology. Among these, the practical implementation of tunnel field-effect transistors (TFETs) with steep subthreshold slope (SS) values is highly anticipated. However, to achieve reasonable performance, there remain urgent challenges, such as increasing the on-current and reducing the SS over a sufficiently wide gate voltage range. This research aims to realize TFETs using heterostructures of two-dimensional materials like MoTe2 and MoS2 with three-dimensional materials such as Si and Ge. Furthermore, it aims to evaluate and improve these characteristics to create better-performing TFETs. The study focuses on three main aspects: the source material, the channel material, and the MOS interface, successfully establishing the foundational technology for vertical Ge/TMDC TFETs. Currently, the p-TFET has a maximum on/off ratio of approximately 2 orders of magnitude and a minimum SS of about 2100 mV/decade, the n-TFET has an on/off ratio of about 4 orders of magnitude and a minimum SS of about 560 mV/decade, indicating that there is still significant room for improvement in its characteristics.
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| Current Status of Research Progress |
Current Status of Research Progress
2: Research has progressed on the whole more than it was originally planned.
Reason
This research aimed to realize vertical p-TFET and vertical n-TFET using heterostructures of MoTe2 and three-dimensional materials, and to evaluate and improve their characteristics to develop better-performing TFETs. Using MoTe2 and 3D material heterostructures for TFETs is a novel approach. The results of this study suggest that MoTe2 could become a new channel material option for practical TFET applications. Similarly, TFETs using Ge/MoS2 and Si/MoTe2 heterostructures were also fabricated. Comparative analysis showed that when Ge is used as the source material, the Ge/MoS2 TFET tends to have higher off-currents compared to Ge/MoTe2, resulting in reduced performance. Additionally, when Si is used as the source material, Ge/MoTe2 was found to achieve higher on-currents at lower drain voltages. This is likely due to the smaller bandgap of Ge compared to Si. The results of this study indicate that the Ge/MoTe2 heterostructure could be a promising source and channel material option for the practical implementation of TFETs.
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| Strategy for Future Research Activity |
To further enhance the performance of TFETs, many unresolved issues need to be addressed. In particular, it is necessary to develop a more effective gate. So far, h-BN has been used as the gate insulating layer, but because h-BN is a low-k material, the equivalent oxide thickness (EOT) of the gate becomes thicker, leading to reduced gate control capability and adversely affecting the SS.
To reduce the EOT of the gate structure, we plan to use Atomic Layer Deposition (ALD) to grow high-k materials such as aluminum oxide or hafnium oxide. At the same time, materials like graphene will be inserted to reduce contact resistance.
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| Causes of Carryover |
去年から他の先生から借りていたAFMが故障してしまい、現在は二次元材料や金属の厚さを特徴づけることができません。新しいAFMを導入する必要が急務です。しかし、AFMの価格が非常に高いため、装置を購入するための十分な資金がありません。そのため、部品を購入して簡単なAFMを組み立て、研究を進めることにする予定です。自作AFMの費用は約400万円程度かかるとの計算です。したがって、現在の予算と来年の予算を組み合わせて、必要な部品を購入したいと考えています。
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