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2014 Fiscal Year Annual Research Report

スーパハイビジョン用エンコーダLSIの研究

Research Project

Project/Area Number 24246064
Research InstitutionWaseda University

Principal Investigator

後藤 敏  早稲田大学, 理工学術院, 教授 (10367170)

Project Period (FY) 2012-04-01 – 2015-03-31
Keywords画像圧縮 / スーパハイビジョン / エンコーダ / デジタル回路設計 / LSI
Outline of Annual Research Achievements

スーパハイビジョン(7680x4320@60fps)は現在のハイビジョン(1920x1080@30fps)に比べ16倍の画素数と2倍のフレーム数を扱うこととなり、スループットでは32倍の速度向上を図る必要がある。特に、エンコーダにおいては、演算量は100倍以上、メモリバンド幅も50~100倍となり、現在までに開発された技術の延長では、高スループットを保証した下で、1チップで実装することは極めて困難である。本研究では、画像符号化の新標準であるHEVC方式を対象に、300MHzで8kx4k画像を60fpsで動作させ、エンコード可能なLSIが実現できることを目標に、アルゴリズムから回路実装までの研究を行った。
本年度は最終年度であり、エンコーダの性能を決める主要な要素である、イントラ予測処理、インター予測処理、インループフィルター、CABAC, DRAMとのインターフェイス処理に関して、新アルゴリスムの開発とハードウエア向けアーキテクチャの設計を行い、論理回路設計を行うことで、目標とする(7680x4320@60fpsを画質を保証して実行できることをシミュレーション上で確認した。各コンポーネントの開発に基づき、8Kx4K@60fpsを400MHzで実行するエンコーダチップの見積ったところ、ロジック回路で約4500Kゲート、SRAMは約750Kゲートでエンコーダのチップを実装できる見込みを得た。

Research Progress Status

26年度が最終年度であるため、記入しない。

Strategy for Future Research Activity

26年度が最終年度であるため、記入しない。

  • Research Products

    (19 results)

All 2015 2014 Other

All Journal Article (6 results) (of which Peer Reviewed: 6 results,  Open Access: 6 results,  Acknowledgement Compliant: 3 results) Presentation (12 results) (of which Invited: 6 results) Remarks (1 results)

  • [Journal Article] High-throughput power-efficient VLSI architecture of fractional motion estimation for Ultra-HD HEVC video encoding2015

    • Author(s)
      Gang He, Dajiang Zhou, Yunsong Li, Zhixiang Chen, Tianruo Zhang, and Satoshi Goto
    • Journal Title

      IEEE Transactions on VLSI Systems (TVLSI)

      Volume: Vo.22 Pages: 76-86

    • DOI

      10.1109/TVLSI.2014.2386897

    • Peer Reviewed / Open Access
  • [Journal Article] Fast SAO estimation algorithm and its implementation for 8Kx4K@120fps HEVC encoding2014

    • Author(s)
      Jiayi Zhu, Dajiang Zhou, Shinji Kimura, and Satoshi Goto
    • Journal Title

      IEICE Transactions on Fundamentals

      Volume: E97-A Pages: 2488-2497

    • DOI

      10.1587/transfun.E97.A.2488

    • Peer Reviewed / Open Access / Acknowledgement Compliant
  • [Journal Article] A new reference frame recompression algorithm and its VLSI architecture for UHDTV video codec2014

    • Author(s)
      Li Guo, Dajiang Zhou, and Satoshi Goto
    • Journal Title

      IEEE Transactions on Multimedia (TMM)

      Volume: 16 Pages: 2323-2332

    • DOI

      10.1109/TMM.2014.2350256

    • Peer Reviewed / Open Access / Acknowledgement Compliant
  • [Journal Article] Ultra-high-throughput VLSI architecture of H.265/HEVC CABAC encoder for UHDTV applications2014

    • Author(s)
      Dajiang Zhou, Jinjia Zhou, Wei Fei, and Satoshi Goto
    • Journal Title

      IEEE Transactions on Circuits and Systems for Video Technology (TCSVT)

      Volume: 25 Pages: 497-507

    • DOI

      10.1109/TMM.2014.2350256

    • Peer Reviewed / Open Access
  • [Journal Article] 7.Jinjia Zhou, Dajiang Zhou, and Satoshi Goto, Alternating asymmetric search range assignment for bidirectional motion estimation in H.265/HEVC and H.264/AVC2014

    • Author(s)
      Jinjia Zhou, Dajiang Zhou, and Satoshi Goto
    • Journal Title

      Journal of Visual Communication and Image Representation (JVCI)

      Volume: 25 Pages: 1275-1286

    • DOI

      10.1016/j.jvcir.2014.01.002

    • Peer Reviewed / Open Access / Acknowledgement Compliant
  • [Journal Article] A 1.59Gpixel/s motion estimation processor with -211 to +211 search range for UHDTV video encoder,2014

    • Author(s)
      Dajiang Zhou, Jinjia Zhou, Gang He, and Satoshi Goto
    • Journal Title

      IEEE Journal of Solid-State Circuits (JSSC)

      Volume: 49 Pages: 827-837

    • DOI

      10.1109/JSSC.2013.2293136

    • Peer Reviewed / Open Access
  • [Presentation] An Area-Efficient 4/8/16/32-Point IDCT Architecture for UHDTV HEVC Decoder2014

    • Author(s)
      Heming Sun, Dajiang Zhou, Shinji Kimura and Satoshi Goto
    • Organizer
      Visual Communication and Image Processing (VCIP)
    • Place of Presentation
      Malta
    • Year and Date
      2014-12-07 – 2014-12-10
  • [Presentation] Langping He, and Satoshi Goto “A High Parallel Way for Processing IQ/IT part of HEVC Decoder Based on GPU2014

    • Author(s)
      Langping He, and Satoshi Goto
    • Organizer
      International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)
    • Place of Presentation
      Kuching, Maraysia,
    • Year and Date
      2014-12-01 – 2014-12-04
    • Invited
  • [Presentation] Unified VLSI Architecture of Motion Vector and Boundary Strength Parameter Decoder for 8K UHDTV HEVC Decoder2014

    • Author(s)
      Shihao Wang, Dajiang Zhou, Jianbin Zhou, Takeshi Yoshimura, and Satoshi Goto
    • Organizer
      Pacific-Rim Conference on Multimedia (PCM)
    • Place of Presentation
      Kuching, Maraysia
    • Year and Date
      2014-12-01 – 2014-12-04
  • [Presentation] FPGA based 3840x2160 Video Decoding and Display System”, Live Demonstration2014

    • Author(s)
      Haoming Zhang, Dajiang Zhou and Satoshi Goto
    • Organizer
      APCCAS
    • Place of Presentation
      Ishigaki, Japan
    • Year and Date
      2014-11-18 – 2014-11-20
    • Invited
  • [Presentation] A 610 Mbin/s CABAC decoder for H.265/HEVC level 6.1 applications2014

    • Author(s)
      Yijin Zhao, Jinjia Zhou, Dajiang Zhou, and Satoshi Goto
    • Organizer
      IEEE International Conference on Image Processing (ICIP)
    • Place of Presentation
      Paris, France
    • Year and Date
      2014-10-27 – 2014-10-30
    • Invited
  • [Presentation] OpenCL based high-quality HEVC motion estimation on GPU2014

    • Author(s)
      Fan Wang, Dajiang Zhou, and Satoshi Goto
    • Organizer
      IEEE International Conference on Image Processing (ICIP)
    • Place of Presentation
      Paris, Farance
    • Year and Date
      2014-10-27 – 2014-10-30
  • [Presentation] Reducing power consumption of HEVC codec with lossless reference frame recompression2014

    • Author(s)
      Dajiang Zhou, Li Guo, Jinjia Zhou, and Satoshi Goto
    • Organizer
      IEEE International Conference on Image Processing (ICIP)
    • Place of Presentation
      Paris, France
    • Year and Date
      2014-10-27 – 2014-10-30
  • [Presentation] VLSI architecture of HEVC intra prediction for 8K UHDTV applications2014

    • Author(s)
      Jianbin Zhou, Dajiang Zhou, Heming Sun, and Satoshi Goto
    • Organizer
      IEEE International Conference on Image Processing (ICIP)
    • Place of Presentation
      Paris, France
    • Year and Date
      2014-10-27 – 2014-10-30
  • [Presentation] Fast SAO estimation algorithm and its VLSI architecture2014

    • Author(s)
      Jiayi Zhu, Dajiang Zhou, Shinji Kimura, and Satoshi Goto,
    • Organizer
      IEEE International Conference on Image Processing (ICIP)
    • Place of Presentation
      Paris, France
    • Year and Date
      2014-10-27 – 2014-10-30
    • Invited
  • [Presentation] A Low Power 720p Motion Estimation Processor with 3D Stacked Memory2014

    • Author(s)
      Shuping Zhang, Jinjia Zhou, Dajiang Zhou and Satoshi Goto
    • Organizer
      IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
    • Place of Presentation
      Playa del Carmen、Mexico
    • Year and Date
      2014-10-06 – 2014-10-08
    • Invited
  • [Presentation] Motion compensation architecture for 8K UHDTV HEVC decoder2014

    • Author(s)
      Shihao Wang, Dajiang Zhou, and Satoshi Goto
    • Organizer
      IEEE International Conference on Multimedia and Expo (ICME)
    • Place of Presentation
      Chendu, China
    • Year and Date
      2014-07-14 – 2014-07-18
  • [Presentation] A Fast Mode Selection Algorithm for HEVC Intra Prediction2014

    • Author(s)
      Heming Sun, and Satoshi Goto
    • Organizer
      ITC-CSCC
    • Place of Presentation
      Phuket, Thailand
    • Year and Date
      2014-07-07 – 2014-07-11
    • Invited
  • [Remarks] 早稲田大学情報生産システム研究科後藤敏研究室

    • URL

      http://www.f.waseda.jp/goto/

URL: 

Published: 2016-06-03  

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