2013 Fiscal Year Final Research Report
Proposal and demonstration of current driven SPIN LOGIC
Project/Area Number |
24656219
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Research Category |
Grant-in-Aid for Challenging Exploratory Research
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Allocation Type | Single-year Grants |
Research Field |
Electronic materials/Electric materials
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Research Institution | Toyota Technological Institute |
Principal Investigator |
AWANO Hiroyuki 豊田工業大学, 工学(系)研究科(研究院), 教授 (40571675)
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Co-Investigator(Kenkyū-buntansha) |
BANG Do 豊田工業大学, 大学院工学研究科, 研究員 (40624804)
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Project Period (FY) |
2012-04-01 – 2014-03-31
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Keywords | 磁壁 / 磁壁電流駆動 / スピンロジック / 反強磁性結合 / 磁壁エネルギ / 静磁エネルギ / ピンニング / コラップス |
Research Abstract |
Low current driven "SPIN LOGIC" has been proposed. We have already succeeded to reduce current denssity for driving domain wall on TbFeCo magnetic wire. Using the TbFeCo magnetic wire, 2 input ports and 1 output port logic circuit was fabricated. When the width of output port is wider than that of input port, the logic works for "AND" operation. In case of nallow width of output port, it works for "OR" logic. These were successfully demonstrated. Moreover, "NOT" and "FUNPOUT" demonstrations were also succeeded. The spin logic circuit and memory can be integrated in the sama substrate and operateed with low current. Thus, current driven spin logic and memory is very attractive for "LOGIC in MOMORY".
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