Development of a Device Simulator Based on an Atomistic Large Scale Calculation

2014 Fiscal Year Final Research Report

• Project/Area Number: 24656235
• Research Category: Grant-in-Aid for Challenging Exploratory Research
• Allocation Type: Multi-year Fund
• Research Field: Electron device/Electronic equipment
• Research Institution: Kobe University
• Principal Investigator: OGAWA Matsuto 神戸大学, 工学(系)研究科(研究院), 教授 (40177142)
• Project Period (FY): 2012-04-01 – 2015-03-31
• Keywords: ナノデバイス / 並列化固有値解析 / 原子軌道展開 / 非平衡グリーン関数法 / ガウス求積法 / Jacobi-Davidson法 / 第一原理計算 / 多項式線形結合法

Outline of Final Research Achievements

[Implementation of a Super-Parallelized BPSM Routine] An order-N simulation method has been established using an expansion method based on a polynomial linear combination of atomic orbitals. In this method Legendre-polynomial, Chevyshev and/or Laguerre-polynomial expansion has been used to parallelize Gaussian quadrature which results in an order-N simulation twice as accurate as conbentional method.
[Realization of a Super-Parallelized Arnoldi/Jacobi-Davidson Eigenvalue Solver]To analyze quantum transport phenomena in such as a DGMOSFET or a FINFET, where quantum confinement is much stronger than in conventional structures, a mode expansion method in the confined structures is found to be utilized effectively in the simulation. To make most of the property, an simulation method has been achieved to analyze larger device size with more than 25 nm in which the matrix size is as large as 10000x10000.

Free Research Field

計算ナノエレクトロニクス