Development of fine grain variable stages pipeline processor for high performance and low power consumption

2015 Fiscal Year Final Research Report

• Project/Area Number: 24700047
• Research Category: Grant-in-Aid for Young Scientists (B)
• Allocation Type: Multi-year Fund
• Research Field: Computer system/Network
• Research Institution: Mie University
• Principal Investigator: Sasaki Takahiro 三重大学, 工学(系)研究科(研究院), 助教 (20362361)
• Project Period (FY): 2012-04-01 – 2016-03-31
• Keywords: プロセッサ / 高性能低消費電力 / パイプラインプロセッサ / 可変パイプライン段数

Outline of Final Research Achievements

Today, high-performance and low-power processor is required. Generally, a processor load changes frequently on program execution. However, many processors do not take advantage of this feature.
This research proposes a fine grain variable structure to achieve both high performance and low power. When a load is low, pipeline stages are unified for low power. On the other hand, a load is high, pipeline stages are divided to construct deep pipeline for high performance. The proposed methods changes these two modes in short time.

Free Research Field

コンピュータアーキテクチャ