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2015 Fiscal Year Final Research Report

Study on test and diagnosis for defects on vias in 3D-LSIs

Research Project

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Project/Area Number 25330062
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeMulti-year Fund
Section一般
Research Field Computer system
Research InstitutionEhime University

Principal Investigator

Higami Yoshinobu  愛媛大学, 理工学研究科, 准教授 (40304654)

Co-Investigator(Kenkyū-buntansha) TAKAHASHI HIROSHI  愛媛大学, 大学院理工学研究科, 教授 (80226878)
Project Period (FY) 2013-04-01 – 2016-03-31
KeywordsLSI / 故障診断 / 遅延故障
Outline of Final Research Achievements

When physical defects occur at vias in 3D-LSIs, propagation of signals will delay. In this research we develop diagnosis methods for delay faults. Targets are delay faults on gate signal lines and clock lines which have various amounts of delay. Also we consider hazard signals which change values temporarily. The effectiveness of the developed methods has been confirmed in the experiments for benchmark circuits.

Free Research Field

計算機工学

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Published: 2017-05-10  

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