Study of Fermi level pinning at metal/germanium interface and its alleviation mechanism

2015 Fiscal Year Final Research Report

• Project/Area Number: 25420320
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Multi-year Fund
• Section: 一般
• Research Field: Electron device/Electronic equipment
• Research Institution: The University of Tokyo
• Principal Investigator: Nishimura Tmonori 東京大学, 工学(系)研究科(研究院), 技術専門職員 (10396781)
• Project Period (FY): 2013-04-01 – 2016-03-31
• Keywords: MOSFET / ゲルマニウム / フェルミレベルピンニング

Outline of Final Research Achievements

To prepare ideal Ge surface, we demonstrated a formation of step and terrace structure with atomically flat surface by H2 annealing. However, it does not effective to weaken the Fermi level pinning even though an atomically flat Ge channel improve its mobility at high electric field. On the other hand, we demonstrated an alleviation of Fermi level pinning at germanide/Ge interface, and we found out strong surface orientation dependence of Ge substrate on its Schottky barrier height. The Schottky barrier height at direct metal/Ge interface is controllable by appropriate metal and interface structure selections. It is possibly explained by intrinsic metal induced gap states with considering free electron densities in contact metal.

Free Research Field

Semiconductor devices