2015 Fiscal Year Final Research Report
Performance evaluation framework for design optimization of next generation low-power many core systems
Project/Area Number |
25730027
|
Research Category |
Grant-in-Aid for Young Scientists (B)
|
Allocation Type | Multi-year Fund |
Research Field |
Computer system
|
Research Institution | The University of Tokyo |
Principal Investigator |
Nakada Takashi 東京大学, 情報理工学(系)研究科, 助教 (00452524)
|
Project Period (FY) |
2013-04-01 – 2016-03-31
|
Keywords | 性能評価 / メニーコアプロセッサ / 共有キャッシュ |
Outline of Final Research Achievements |
Performance estimation techniques of shared cache are important for performance evaluation of many core processors. Tradeoff between evaluation speed and accuracy is a key. To cope with this problem, I tried to develop fast simulator of shared cache. Simplification is a way to improve simulation speed but it also causes degradation of accuracy. I also tried to manage both speed and accuracy by speculative techniques. However, in this project, is was not possible to make compatible speed and accuracy with practical applications.
|
Free Research Field |
計算機アーキテクチャ
|