Understanding of carrier transport properties of Ge-On-Insulator CMOS and establishment of performance enhancement engineering

2016 Fiscal Year Final Research Report

• Project/Area Number: 26249038
• Research Category: Grant-in-Aid for Scientific Research (A)
• Allocation Type: Single-year Grants
• Section: 一般
• Research Field: Electronic materials/Electric materials
• Research Institution: The University of Tokyo
• Principal Investigator: Takagi Shinichi 東京大学, 大学院工学系研究科(工学部), 教授 (30372402)
• Co-Investigator(Renkei-kenkyūsha): TAKENAKA Mitsuru 東京大学, 大学院工学系研究科, 准教授 (20451792)
• Project Period (FY): 2014-04-01 – 2017-03-31
• Keywords: MOSFET / ゲルマニウム / 移動度 / 反転層 / サブバンド

Outline of Final Research Achievements

We have proposed and demonstrated a novel fabrication process including re-bonding GOI substrates to Si substrates for improving the GOI back interface quality and have succeeded in operation of 2-nm-thick GOI MOSFETs by a digital thinning process. It has been clarified through temperature dependence of mobility that mobility degradation of GOI MOSFETs with thinning GOI is attributable to thickness fluctuation scattering. We have modified the Ge condensation process by insertion of annealing steps, continuous thermal processes without any cooling and much longer cooing time, resulting in formation of GOI films with high compressive strain. Combined with the digital thinning process, we have succeeded in 4.5-nm-thick strained GOI MOSFETs with high mobility characteristics.

Free Research Field

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