Study on deep learning hardware construction method based on synchronous shift data transfer

2016 Fiscal Year Final Research Report

• Project/Area Number: 26330060
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Multi-year Fund
• Section: 一般
• Research Field: Computer system
• Research Institution: Tokyo University of Agriculture and Technology
• Principal Investigator: KITAZAWA HITOSHI 東京農工大学, 工学(系)研究科(研究院), 教授 (60345329)
• Project Period (FY): 2014-04-01 – 2017-03-31
• Keywords: ディープラーニング / FPGA / リコンフィギャラブルシステム / 物体識別 / 移動物体抽出

Outline of Final Research Achievements

In this research, we aimed to realize parallel processing hardware using FPGA and applying it to motion image processing for high speed processing and high identification accuracy of deep learning. First, using an SIMD array type circuit, a back propagation learning circuit applying "synchronous shift data transfer" was realized with an FPGA. Next, a high-speed processing circuit of deep learning using pipelined multiply-accumulate circuits with throughput 1 clock par pixel was realized. Furthermore, as an application of deep learning, we show that deep learning can identify objects with high accuracy in Multi-Stream Tracking hardware that inputs images from 64 cameras and extracts, tracks and identifies moving objects by using one FPGA board.

Free Research Field

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