2016 Fiscal Year Final Research Report
A Study of Accelerating Boolean Satisfiability Solvers
| Project/Area Number |
26330248
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Multi-year Fund |
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| Section | 一般 |
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| Research Field |
Intelligent informatics
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| Research Institution | University of Yamanashi |
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Principal Investigator |
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| Project Period (FY) |
2014-04-01 – 2017-03-31
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| Keywords | 充足可能性判定問題 / SATソルバー |
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| Outline of Final Research Achievements |
A SAT solver that determines satisfiability of a given propositional formula is a key technique to solve hard combinatorial instances, and is used in various fields such as system verification and scheduling. The purpose of this research project is performance improvement of SAT solvers. We studied and developed lightweight simplification techniques that are applied during solving, robust heuristics for restarts and clause database reductions, parallel solving and so on. We have achieved the performance improvement by using these techniques compared with previous work.
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| Free Research Field |
人工知能基礎
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