2014 Fiscal Year Research-status Report
Self-learnable Analog-Digital-Mixed VLSI Processors for Smart Human-Computer-Interaction
| Project/Area Number |
26870227
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| Research Institution | Japan Advanced Institute of Science and Technology |
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Principal Investigator |
ZHANG Renyuan 北陸先端科学技術大学院大学, 情報科学研究科, 助教 (00709131)
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| Project Period (FY) |
2014-04-01 – 2017-03-31
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| Keywords | Analog-Digital-Mixed / Hybrid computing / Multi-Valued Logics / HCI / Neuron-MOS / FPGA |
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| Outline of Annual Research Achievements |
As the first and basic stage of this project, the analog-digital hybrid computing is developed for the purpose of human-computer interaction (HCI). In our previous works, it has been found that traditional binary computing fashion appears inefficient in the HCI tasks. On the other hand, our previously proposed analog computing scheme suffers from the inaccuracy problems very much. Thus, in this project we explored the hybrid between analog and binary computing: so-called “multi-valued logics” (MVL), which represents and processes information by more than two levels of states.
To implement the MVL in silicon, the Neuron-MOS technology was applied to carry out MVL in standard CMOS process. Towards to the complex computation, we developed many necessary elements and circuitry such as MVL logic gates, memories and so on. They appear some benefit on performances compared to the traditional digital processing scheme.
Since our final target of this project is the HCI tasks, the flexibility of circuits and systems is especially concerned. We developed a specific FPGA scheme on the basis of MVL, and designed the proof-of-concept processor. From the circuit simulation results, this processor operates as expected. So far, it has been fabricated as actual VLSI chips. Soon, we will receive the chips for the further investigation.
As a bonus of this project, we found our basic technology applied in this works, Neuron-MOS mechanism, is very useful to generate programmable and reliable clock delay. Some promising progresses on this discovery have been disclosed during this year.
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| Current Status of Research Progress |
Current Status of Research Progress
2: Research has progressed on the whole more than it was originally planned.
Reason
Although the steps of plan are modified somehow, the progress was generally made in a smooth flow and satisfying. This self-evaluation is made on the following basis: 1. many necessary analog-digital-hybrid computing elements, circuits and schemes have been successfully designed; 2. those designs have been verified in simulation and our original VLSI chips have been fabricated; 3. some key technologies in this project inspired new development on other relevant researches; 4. our efforts on MVL circuits attract attention even donation from industry; 5. some progresses have been disclosed and accepted by relevant societies.
The reason why the steps flow of research plan was modified is listed as follows: 1. in our initial plan, a very first effort would be made on the algorithm side. However, during our preliminary experiments, it was found that the bottleneck of our target applications is not the algorithm and intelligence level but the hardware processing capacity. Thus, we decided to put more efforts in the circuit development; 2. we harvested the promising progresses on MVL circuits and systems; 3. Since we received the industrial donation of powerful FPGA suit and processors, the development on the hardware side can be made earlier than the initial plan; 4. It was found that the analog-digital-hybrid computing has a wider scope for the future development in not only HCI but also general purpose VLSI systems.
In general, we harvested the expected progresses over technical papers, real VLSI chips and attention from real industry.
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| Strategy for Future Research Activity |
Further efforts will be made along the analog-digital-hybrid computing road-map, especially on the basis of our newly proposed MVL scheme.
Recently, we are considering to build a reasonable large scale of MVL general purpose processor. In current plan, this processor is re-configurable and hopefully in a FPGA fashion. Regarding the performances the benefits, we would most efforts on the interconnection reduction, which is supposed to be a key problem for hardware implementation of AI.
On the algorithm and application side, we will keep seeking newly developed recognition algorithms and trying to apply them by hardware. We still think the FPGA suit which we recently obtained is the first option. It is because this suit includes the camera, display and touch sensors within System-on-Board. Furthermore, the FPGA implementations also give us some hints on our original FPGA circuits.
As a concrete schedule, we would like to design and fabricate two VLSI chips for MVL computing in this year; and build one FPGA-based demo systems for human action recognition. For academia harvests, of course, more technical publications are expected; even hopefully apply the proposed technology in real industry.
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| Causes of Carryover |
There are two main reasons leading the remaining budget: 1. in our initial plan, an advanced FPGA suit would be purchased using the budget. However, our progress on MVL-based FPGA research attracted the attention from industry. Thus, the world-top class FPGA supplier, Altera Co., donated a top-valued FPGA suit DE5-Net (valued JPY 1,100,000) to our group for our further development; 2. Our paper about Neuron-MOS technology was successfully accepted by ACM Tran. Des. Autom. Electron. Syst. (TODAES). But the publisher delayed the batch assignment. As a result, the payment of page-charge is also delayed.
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| Expenditure Plan for Carryover Budget |
The remaining budget of FY2014 (expected JPY 700,000) is expected be transferred to and used in the FY2015. The most obvious usage is one additional VLSI chip fabrication and its relevant kits (expected JPY 300,000), which is very necessary for improving our proposed MVL circuits. Hopefully, we would like to usage the remaining budget for presenting an additional paper on an international conference. Some consumable equipment are also considered such as (in order of priority): handwriting recognize panel for HCI, personal computer, and camera. For investment of HCI equipment, we would attract the industrial donations as priority.
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