1988 Fiscal Year Final Research Report Summary
Lateral Solid Phase Epitaxy of Selectively Doped Si Films
| Project/Area Number |
61460063
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| Research Category |
Grant-in-Aid for General Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Research Field |
Applied materials
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| Research Institution | Tokyo Institute of Technology |
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Principal Investigator |
ISHIWARA Hiroshi Tokyo Institute of Technology, 大学院総合理工学研究科, 助教授 (60016657)
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| Co-Investigator(Kenkyū-buntansha) |
TSUTSUI Kazuo Tokyo Institute of Technology, 工学部, 助手 (60188589)
SASAKI Kimihiro Tokyo Institute of Technology, 大学院総合理工学研究科, 助手 (40162359)
FURUKAWA Seijiro Tokyo Institute of Technology, 大学院総合理工学研究科, 教授 (60016318)
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| Project Period (FY) |
1986 – 1987
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| Keywords | lateral solid phase epitaxy / selective doping / MOSFET / silicon-on-insulator / amorphous Si / 選択ドーピング |
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| Research Abstract |
Selective doping methods in lateral solid phase epitaxy of amorphous Si (a-Si) films have been investigated, in which P atoms were non-uniformly incorporated (1) along the grwoth direction or (2) along the normal direction of the surface. In the first method, P atoms were uniformly doped in a-Si films except a stripe region parallel to the seed stripe. The doped regions in this structure can be used as the source and drain regions of MOSFETs, while the undoped region can be used as a channel between them. It was found that diffusion of P atoms during the growth could be neglected and the FET characteristics were observed even in a device with a channel of 1 m. In the second method, only the surface region of a-Si films were doped with P atoms and the region was etched after the growth was completed, so that the large undoped region which exists under the P-doped region can be used as a single crystalline film. It was found that the growth characteristics were mainly governed by the thickness of the P-doped layer, rather than the thickness of the a-Si film. Based on these results, a growth model for the surface selective doping method was proposed. Finally, simultaneous growth of Stacked silicon-on-insulator structures by a single annealing process was proposed and its feasibility was experimentally shown.
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