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1989 Fiscal Year Final Research Report Summary

Switched-capacitor Discrete Fourier Transform and its inverse Transform device for the signal of speech's frequency-band

Research Project

Project/Area Number 62550291
Research Category

Grant-in-Aid for General Scientific Research (C)

Allocation TypeSingle-year Grants
Research Field 電子機器工学
Research InstitutionOsaka Prefecture University

Principal Investigator

YONEDA Shojiro  Univ. of Osaka Pref. College of Eng., Dep. of E. E. Prof., 工学部, 教授 (40081286)

Co-Investigator(Kenkyū-buntansha) SASAKI Itsuo  Univ. of Osaka Pref. College of Integrated Artsand Science, Dept. of Instrument, 総合科学部, 助手 (60094504)
Project Period (FY) 1987 – 1989
Keywordsswitched-capacitor / real-time processing / Discrete Fourier Transform / 64 sampling points / Fundamental period / Inverse Discrete Fourier Transform / Completely parallel processing / time-dependent sinusoidal output
Research Abstract

The processings from the first-stage to the analysis and the recognition of the speech's signal are processed by the computer-technology in general. This brings the more quantities of the memory, the calculation and the super high-speed processings to the computer. Recently, these trends will have been increasing more and more, because the unknown new factors have been consequently found by the computer technology. As a result, the complete real-time processing and the small-sized realization using computer technology may be impossible.
Then, the methods of the complete real-time and parallel processings are proposed by using the switched-capacitor Discrete Fourier Transform and its Inverse Transform (DFT-IDFT), as follows ;
1) The output of DFT is obtained as all the time-functioned higher-harmonics including the amplitude's and the phase's informations at the same time. 2) IDFT is obtained simply only by adding the above DFT's outputs. 3) The fundamental period of the unknown speech's signal are obtained also in the real-time. 4) From the speech-signal's DFT, the two-dimensional DFT have been developed also in order to approach to the basic of the futer image procession. 5) In order to use the many DFT's output in parallel and in same-time , the switched-capacitor neural network have been also proposed aiming at a real-time processing of the recognition.

  • Research Products

    (20 results)

All Other

All Publications (20 results)

  • [Publications] 荻原昭夫: "高速逆変換が可能な64ポイント・スイッチトキャパシタ離散フ-リエ変換回路" 電子情報通信学会論文誌A,. J73ーA. 35-43 (1990)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Shojiro YONEDA: "A switched-capacitor DFT-IDFT circuit" International Journal of Electronics. 67. 839-851 (1989)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Itsuo SASAKI: "Switched-capacitor discrete Fourier analyzer with window function circuit" International Journal of Electronics. 64. 451-460 (1988)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Akio OGIHARA: "A swiched-capacitor 64 points DFT-IDFT systems and its application to real-time processing of vowel recognition" Proceedings of International Conference on I.EEE.Circuits and Systems. SP1. 587-590 (1989)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Itsuo SASAKI: "Switched-capacitor discrete Walsh transform circuit with time series spectra" Proceedings of Japan-Korea Joint Technical Conference on Circuits/Syatems Computers and Communiocations. A4ー5. 222-227 (1989)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Itsuo SASAKI: "Switched-capacitor realization of a Walsh transform circuit and its application to sequency filtering" Proceedings of I EEE International Symposium on Circuits and Systems. 2477-2480 (1988)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 佐々木逸雄: "スイッチト・キャパシタ回路を用いた位相同期型ウォルッシュ解析器" 電子情報通信学会論文誌C. J71ーC. 520-526 (1988)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Koichi MATSUMOTO: "SC realization of a two-dimension discrete Fourier transform circuit using time-division multiplex" Proceedings of Japan-Korea Joint Technical Conference on Circuits/Systems,Computers,and Communications. C1ー5. 258-263 (1988)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Shojiro YONEDA: "A consideration of the problems in switched-capacitor realization of non-recursive and recursive filters" International Journal of Electronics. 64. 537-546 (1988)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Akio OGIHARA: "Switched-capacitor delay system suitable for cascaded multi-stages" International Journal of Electronics. (1990)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Akio OGIHARA and Shojiro YONEDA: "A 64 points switched-capacitor Discrete Fourier Transform circuit for high speed inverse one" Trans. of Institute of Electronics, Information and Communication Engineers of Japan A, J73-A, 1, pp. 35-43, 1990.

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Shojiro YONEDA, Isao NAKANISHI, Itsuo SASAKI and Akio OGIHARA: "A switched-capacitor DFT-IDFT circuit" International Journal of Electronics 67, 6, 839-851, 1989.

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Itsuo SASAKI and Shojiro YONEDA: "Switched-capacitor discrete Fourier analyzer with window function circuit" International Journal of Electronics 64, 3, pp. 451-460, 1988.

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Akio OGIHARA and Shojiro YONEDA: "A switched-capacitor 64 points DFT-IDFT systems and its application to real-time processing of vowel recognition" Proceedings of International Conference on I. EEE. Circuits and Systems, SP1, pp. 587-590.

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Itsuo SASAKI, Shojiro YONEDA and Kazuya YAMANAKA: "Switched-capacitor discrete Walsh transform circuit with time series spectra" Proceedings of Japan-Korea Joint Technical Conference on Circuits/Systems Computers and Communications, A4-5, pp. 222-227, 1989.

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Itsuo SASAKI, Kenji MATSUI and Shojiro YONEDA: "Switched-capacitor realization of a Walsh transform circuit and its application to sequency filtering" Proceedings of I. EEE. International Symposium on Circuits and Systems, 2477-2480, 1988.

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Itsuo SASAKI and Shojiro YONEDA: "Phase synchronous type Walsh analyzer using switched-capacitor circuit" Trans. of the Institute of Electronics, Information and Communication Engineers of Japan C, J71-C, 4, pp. 520-526, 1988.

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Koitch MATSUMOTO and Shojiro YONEDA: "SC realization of a two-dimension discrete Fourier Transform circuit using time-division multiplex" Proceedings of Japan-Korea Joint Technical Conference on Circuits/Systems, Computers, and Communications, C1-5, 258-263, 1988.

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Shojiro YONEDA, Yoshihiko ABE and Itsuo SASAKI: "A consideration of the problems in switched-capacitor realization of non-recursive and recursive filters" International Journal of Electronics, 64, 4, pp. 537-546, 1988.

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Akio OGIHARA, Hiromi HAMANO and Shojiro YONEDA: "Switched-capacitor delay system suitable for cascaded multi-stages" International Journal of Electronics.

    • Description
      「研究成果報告書概要(欧文)」より

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Published: 1993-03-26  

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