| Project/Area Number |
10680350
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
計算機科学
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| Research Institution | Nagoya University |
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Principal Investigator |
HIRATA Tomio School of Engineering, Nagoya University, Professor, 工学研究科, 教授 (10144205)
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| Co-Investigator(Kenkyū-buntansha) |
ISO Naoyuki Chuko University, Associate Professor, 情報科学部, 講師 (80283406)
ONO Takao School of Engineering, Nagoya University, Assistant Professor, 工学研究科, 助手 (60311718)
FUJITO Toshihiro School of Engineering, Nagoya University, Associate Professor, 工学研究科, 助教授 (00271073)
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| Project Period (FY) |
1998 – 2000
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| Project Status |
Completed (Fiscal Year 2000)
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| Budget Amount *help |
¥2,900,000 (Direct Cost: ¥2,900,000)
Fiscal Year 2000: ¥800,000 (Direct Cost: ¥800,000)
Fiscal Year 1999: ¥800,000 (Direct Cost: ¥800,000)
Fiscal Year 1998: ¥1,300,000 (Direct Cost: ¥1,300,000)
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| Keywords | approximation algorithm / satisfiability problem / max cut / edge dominating set / layout design / logic emulator / 距離変換 / ネット割り当て問題 / 辺支配集合問題 / ペトリネット / 頂点除去問題 / マトロイド / 充足最大化問題 / 判定値計画法 / 摂動 |
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| Research Abstract |
The purpose of this research is to develop efficient approximation algorithms with high performance ratio for various combinatorial optimization problems. The problems we treat includes the satisfiability of a Boolean expression (MAX SAT), the maximum cut of a graph (MAX CUT) and the edge-dominating set of a graph. Since these problems are all NP-hard, it is theoretically, as well as practically, important to develop approximation algorithms with high performance ratio.
The results obtained are as follows. We introduced perturbation on a truth assignment and obtained a better algorithm for MAX SAT.We proposed an algorithm for the minimization of vias in the VLSI layout design. We designed an efficient algorithm for the Euclidean distance transform and gave an uniform method for morphology operations in picture processing. We designed an efficient algorithm for the net assignment problem in logic emulator, which is used for logic verification process in designing large scale circuits. Furthermore, approximability of the edge dominating set problem and its related ones are also investigated.
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