| Project/Area Number |
11450145
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
情報通信工学
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| Research Institution | Tokyo Institute of Technology |
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Principal Investigator |
FUJII Nobuo Tokyo Institute of Technology, Graduate School of Science and Engineering, Professor, 大学院・理工学研究科, 教授 (00016601)
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| Co-Investigator(Kenkyū-buntansha) |
KANEKO Mineo Japan Advanced Institute of Science and Technology, School of Information Science, Professor, 情報科学研究科, 教授 (00185935)
TAKAGI Shigetaka Tokyo Institute of Technology, Graduate School of Science and Engineering, Professor, 大学院・理工学研究科, 教授 (10187932)
NISHIHARA Akinori Tokyo Institute of Technology, Center for Research and Development of Educational Technology, Professor, 教育工学開発センター, 教授 (90114884)
TAKAKUBO Kawori Tokai University, Faculty of Engineering, Associate Professor, 工学部, 助教授 (40282834)
ISHIKAWA Masayuki Kisarazu National College of Technology, Department of Electrical and electronic Engineering, Professor, 電気電子工学科, 教授 (50143665)
和田 和千 豊橋技術科学大学, 情報工学系, 講師 (00302943)
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| Project Period (FY) |
1999 – 2002
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| Project Status |
Completed (Fiscal Year 2002)
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| Budget Amount *help |
¥14,500,000 (Direct Cost: ¥14,500,000)
Fiscal Year 2002: ¥2,200,000 (Direct Cost: ¥2,200,000)
Fiscal Year 2001: ¥2,700,000 (Direct Cost: ¥2,700,000)
Fiscal Year 2000: ¥2,700,000 (Direct Cost: ¥2,700,000)
Fiscal Year 1999: ¥6,900,000 (Direct Cost: ¥6,900,000)
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| Keywords | analog basic building block / A-D converte / switched-capacitor amplifier / automatic analog circuit design / digital substrate noise / 自動合成 / 遺伝的アルゴリズム / 再利用 / 雑音 / Rail-to-Rail OTA / スイッチトキャパシタ回路 / 電圧フォロワ / Companding積分器 / アナログ集積回路 / 電圧平均回路 / スイッチトカレント回路 / OTA / 低消費電力 / 低歪み |
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| Research Abstract |
The aim of this project is to build up a design system for analog circuits in mixed-signal LSIs, which are expected to play an important role in 21st century. The following results are obtained in the project.
(1) In order to build such a system analog basic building blocks under low-power supply voltages are proposed. The circuits are applied to a synthesis of a △ΣAS Analog-to-Digital converter as an example.
(2) Switched-capacitor circuits are discrete-time signal processing ones and also important analog building blocks Since sitched-capacitor circuits have a clock feedthrough problem, a method to reduce the clock feedthrough effect is proposed.
(3) To help analog circuit designs instead of a small number of analog circuit designers automatic analog circuit design algorithm is proposed.
(4) To reduce noise from digital circuits via a substrate active gurad band circuit is proposed.
Investigation for excellent analog circuit layouts and combination of all results obtained above are left as future problems.
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