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ディペンダブルなLSIの動作合成

Research Project

Project/Area Number 11J07598
Research Category

Grant-in-Aid for JSPS Fellows

Allocation TypeSingle-year Grants
Section国内
Research Field Computer system/Network
Research InstitutionNara Institute of Science and Technology (2012)
Ritsumeikan University (2011)

Principal Investigator

原 祐子 (2012)  奈良先端科学技術大学院大学, 情報科学研究科, 助教

安積 祐子 (2011)  立命館大学, 総合理工学研究機構, 特別研究員(PD)

Project Period (FY) 2011 – 2012
Project Status Declined (Fiscal Year 2012)
Budget Amount *help
¥1,600,000 (Direct Cost: ¥1,600,000)
Fiscal Year 2012: ¥800,000 (Direct Cost: ¥800,000)
Fiscal Year 2011: ¥800,000 (Direct Cost: ¥800,000)
Keywords動作合成 / 高位合成 / ディペンダブル / 高信頼性 / ソフトエラー / 製造ばらつき / 製造歩留まり / 経年劣化 / 耐故障性
Research Abstract

今年度はシステムレベルからアプリケーションレベルまで,様々なレイヤーから多面的に,様々な故障に対する高信頼システムの設計技術の研究を行った.
(1)ソフトエラーに対する耐故障LSI回路の動作合成手法を提案した.演算結果がレジスタに保存されている間に起こるソフトエラーの影響を考慮し,さらに,コスト・性能・信頼性の異なるいくつかの演算器を活用することで,従来の三重化に依らずに,効率良く高信頼LSIを生成する手法を提案した.研究成果は国際会議で発表した.
(2)アプリケーションの特徴を最大限活用し,ソフトエラー耐性を保証するための最小限のエラーチェックをソフトウェアで行う手法を提案した.研究成果は学術論文誌に採択済みである.
(3}製造ばらつきによるタイミング違反を,ハードウェアとソフトウェアの両面から補完する効率的なプロセッサの拡張手法を提案した.研究成果は国際会議で発表した.研究成果は本分野で最高峰の国際会議の1つであるASPDACで発表した.
(4)更に,経年劣化によるタイミング違反をも考慮するよう,(3)の研究を発展させた.研究成果は本分野で最高峰の国際会議の1つであるDATEで発表した.
(5)製造ばらつきによる歩留まり低下やタイミング違反を抑えるための,高位合成によるRTL回路の生成アルゴリズムを見直した.研究成果は学術論文誌に採択済みである.さらに,国際会議と国内研究会で発表した.
(6)製造歩留まり低下を解決するための,極小プロセッサの提案,および,その評価を行った.本研究成果は国内研究会で発表した.
(7)以上の成果について,マルチプロセッサやバイオチップなどの他分野における応用研究を行った.研究成果は国際会議で発表した.

Report

(2 results)
  • 2012 Annual Research Report
  • 2011 Annual Research Report
  • Research Products

    (20 results)

All 2013 2012 2011

All Journal Article (2 results) (of which Peer Reviewed: 2 results) Presentation (18 results)

  • [Journal Article] Quantitative Evaluation of Rescfurce Sharing in High-L£vel Synthesis Using Realistic Benchmarks2013

    • Author(s)
      Yuko Hara-Azumi, Tbshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada
    • Journal Title

      IPSJ Trans. System LSI Design Methodology

      Volume: 6

    • Related Report
      2012 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Selective Check of Data-Path for Effective Fault Tblerance2013

    • Author(s)
      Tanvir Ahmed, Jun Yao, Yuko Hara-Azumi, Shigeru Yamashita, Yasuhiko Nakashima
    • Journal Title

      IEICE Trans. on Information and Systems

    • Related Report
      2012 Annual Research Report
    • Peer Reviewed
  • [Presentation] Comparison of Emulation-Oriented 8-bit ISA with 6502 ISA for an ARM2013

    • Author(s)
      Hao Xu, Yuko Hara-Azumi, Yasuhiko Nakashima
    • Organizer
      第196回計算機アーキテクチャ研究会
    • Place of Presentation
      和歌山県田辺市
    • Year and Date
      2013-03-27
    • Related Report
      2012 Annual Research Report
  • [Presentation] Instruction-Set Extension under Process Variation and Aging Effects2013

    • Author(s)
      Yuko Hara-Azumi, Farshad Firouzi, Saman Kiamehr, Mehdi Tahoori
    • Organizer
      Design, Automation & Test in Europe (DATE)
    • Place of Presentation
      Grenoble, France
    • Year and Date
      2013-03-19
    • Related Report
      2012 Annual Research Report
  • [Presentation] Cost-Efficient Scheduling in High-Level Synthesis for Soft-Error Vulnerability Mitigation2013

    • Author(s)
      Yuko Hara-Azumi, Hiroyuki Tomiyama
    • Organizer
      International Symposium on Quality Electronic Design (ISQED)
    • Place of Presentation
      Santa Clara, CA, USA
    • Year and Date
      2013-03-06
    • Related Report
      2012 Annual Research Report
  • [Presentation] A Clique-Based Approach to Find Binding and Scheduling Result in Flow-Based Microfluidics Biochips2013

    • Author(s)
      Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho, Yuko Hara-Azumi
    • Organizer
      Asia and South Pacific Design Automation Conference (ASP-DAC)
    • Place of Presentation
      Yokohama, Japan(招待講演)
    • Year and Date
      2013-01-23
    • Related Report
      2012 Annual Research Report
  • [Presentation] VISA Synthesis : Variation-Aware Instruction Set Architecture Synthesis2013

    • Author(s)
      Yuko Hara-Azumi, Takuya Azumi, Nikil D. Dutt
    • Organizer
      Asia and South Pacific Design Automation Conference (ASP-DAC)
    • Place of Presentation
      Yokohama, Japan
    • Year and Date
      2013-01-23
    • Related Report
      2012 Annual Research Report
  • [Presentation] TECSCE : HW/SW Codesign Framework for Data Parallelism Based on Software Component2013

    • Author(s)
      Takuya Azumi, Yasaman Samei Syahkal, Yuko Hara-Azumi, Hiroshi Oyama, Rainer Domer
    • Organizer
      International Embedded Systems Symposium (IESS)
    • Place of Presentation
      Paderborn, Germany(発表決定)
    • Related Report
      2012 Annual Research Report
  • [Presentation] Partial Controller Retiming in High-Level Synthesis2013

    • Author(s)
      Ryoya Sobue, Yuko Hara・Azumi, Hiroyuki Tomiyama
    • Organizer
      Electronic System Level Synthesis Conference(ESLsyn)
    • Place of Presentation
      Austin, TX, USA(発表決定)
    • Related Report
      2012 Annual Research Report
  • [Presentation] A Redundant Wire Addition Method for Patchable Accelerator2012

    • Author(s)
      Masayuki Wakizaka, Hiroaki Yoshida, Yuko Hara-Azumi, Shigeru Yamashita
    • Organizer
      International Conference on Electronics, Circuits, and Systems (ICECS)
    • Place of Presentation
      Seville, Spain
    • Year and Date
      2012-12-11
    • Related Report
      2012 Annual Research Report
  • [Presentation] クロック周波数向上のための動作合成におけるコントローラ設計手法2012

    • Author(s)
      祖父江亮哉, 原祐子, 稗田拓路, 谷口一徹, 冨山宏之
    • Organizer
      デザインガイア 2012
    • Place of Presentation
      福岡県福岡市
    • Year and Date
      2012-11-28
    • Related Report
      2012 Annual Research Report
  • [Presentation] Task Mapping Techniques for Embedded Many-core SoCs2012

    • Author(s)
      Junya Kaida, Takuji Hieda, Ittetsu Taniguchi, Hiroyuki Tomiyama, Yuko Hara-Azumi, Koii Inoue
    • Organizer
      International SoC Design Conference (ISOCC)
    • Place of Presentation
      Jeju, Korea
    • Year and Date
      2012-11-06
    • Related Report
      2012 Annual Research Report
  • [Presentation] Selective Resource Sharing with RT-Level Retiming for Clock Enhancement in High-Level Synthesis2012

    • Author(s)
      Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tbmiyama, Shinya Honda, Hiroaki Takada
    • Organizer
      International Conference on Embedded Software and Systems (ICESS)
    • Place of Presentation
      Liverpool, UK
    • Year and Date
      2012-06-26
    • Related Report
      2012 Annual Research Report
  • [Presentation] Virtual Platform Generation Using TECS Software Component and SCE2012

    • Author(s)
      Takuya Azumi
    • Organizer
      Quo Vadis, Virtual Platforms? Challenges and Solutions for Today and Tomorrow
    • Place of Presentation
      Dresden, Germany
    • Year and Date
      2012-03-16
    • Related Report
      2011 Annual Research Report
  • [Presentation] A TMR-based Soft Error Mitigation Technique With Less Area Overhead in High-Level Synthesis2012

    • Author(s)
      Masayuki Wakizaka
    • Organizer
      the Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI)
    • Place of Presentation
      B-CON PLAZA(大分県)
    • Year and Date
      2012-03-09
    • Related Report
      2011 Annual Research Report
  • [Presentation] High-Level Synthesis Using Partially-Programmable Resources for Yield Improvement2012

    • Author(s)
      Yuko Hara-Azumi
    • Organizer
      the Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI)
    • Place of Presentation
      B-CON PLAZA(大分県)
    • Year and Date
      2012-03-09
    • Related Report
      2011 Annual Research Report
  • [Presentation] Bit Selective SAD and Its Evaluation2012

    • Author(s)
      Shigeru Yamashita
    • Organizer
      the Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI)
    • Place of Presentation
      B-CON PLAZA(大分県)
    • Year and Date
      2012-03-08
    • Related Report
      2011 Annual Research Report
  • [Presentation] Clock-Constrained Simultaneous Allocation and Binding for Multiplexer Optimization in High-Level Synthesis2012

    • Author(s)
      Yuko Hara-Azumi
    • Organizer
      Asia and South Pacific Design Automation Conference (ASP-DAC)
    • Place of Presentation
      Sydney, Australia
    • Year and Date
      2012-02-01
    • Related Report
      2011 Annual Research Report
  • [Presentation] リソースの再利用による実装面積を考慮した耐故障化高位合成手法2011

    • Author(s)
      鶴田大輔
    • Organizer
      DAシンポジウム
    • Place of Presentation
      ホテル下呂温泉水明館(岐阜県)
    • Year and Date
      2011-08-31
    • Related Report
      2011 Annual Research Report
  • [Presentation] Software Component-Based HW/SW Cosimulation Framework : A Case Study2011

    • Author(s)
      Takuya Azumi
    • Organizer
      Real-Time and Embedded Technology and Applications Symposium (RTAS)
    • Place of Presentation
      Chicago, Illinois, USA
    • Year and Date
      2011-04-13
    • Related Report
      2011 Annual Research Report

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Published: 2011-12-12   Modified: 2024-03-26  

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