| Project/Area Number |
13680391
|
|---|
| Research Category |
Grant-in-Aid for Scientific Research (C)
|
| Allocation Type | Single-year Grants |
|---|
| Section | 一般 |
|---|
| Research Field |
計算機科学
|
|---|
| Research Institution | Gunma University |
|---|
Principal Investigator |
WEI Shugang Gunma Univ., Dept. of Computer Science, Ass. Prof., 工学部, 助教授 (10251125)
|
|---|
| Co-Investigator(Kenkyū-buntansha) |
SHIMIZU Kensuke Gunma Univ., Dept. of Computer Science, Prof., 工学部, 教授 (20008444)
|
|---|
| Project Period (FY) |
2001 – 2002
|
| Project Status |
Completed (Fiscal Year 2002)
|
| Budget Amount *help |
¥2,200,000 (Direct Cost: ¥2,200,000)
Fiscal Year 2002: ¥700,000 (Direct Cost: ¥700,000)
Fiscal Year 2001: ¥1,500,000 (Direct Cost: ¥1,500,000)
|
|---|
| Keywords | Residue number system(RNS) / Residue arithmetic / Signed-Digit / Error check / RSA encryption / Booth recording / multiplier / Addition |
|---|
| Research Abstract |
A novel residue arithmetic algorithm using radix-2 signed-digit(SD) number representation is presented. By the algorithm, memoryless residue arithmetic circuits using SD adders can be implemented. Conventional residue arithmetic circuits have been designed using binary number arithmetic system, but the carry propagation arises which limits the speed of arithmetic operations in residue modules. We introduced a p-digit radix-2 SD number system to simplify the residue operation. The proposed algorithm is also applied to the high reliable arithmetic system and the RSA public-key encryption processor.
・ Based on the presented residue SD addition circuits, the modulo m addition time is independent of the word length of operands. When m = 2^P or m = 2^P ± 1, the modulo m addition is implemented by using only one SD adder. Moreover, a modulo m multiplier is constructed using a binary modulo m SD adder tree, and the modulo m multiplication can be performed in a time proportional to log_2p.
・ A fast residue checker for the error detection of arithmetic circuits has been presented. The residue checker consists of a number of residue arithmetic circuits such as adders, multipliers and binary-to-residue converters based on radix-two signed-digit(SD) number arithmetic. The proposed modulo m (m = 2^P ± 1) adder is designed with a p-digit SD adder, so that the modulo m addition time is independent of the word length of operands.
・ A modulo m addition can be implemented by using two SD adders, one for SD addition and another for the modular operation with the complement of m,m^*. A modular multiplication is performed by repeating the modular shift and the modular addition operations in a radix-two SD number representation. By using a booth recording method, the speed of a modular multiplication becomes twice as fast as original one.
|
