Research and development of a pixel detector for a beam profile monitor for a linear collider
| Project/Area Number |
14204020
|
|---|
| Research Category |
Grant-in-Aid for Scientific Research (A)
|
| Allocation Type | Single-year Grants |
|---|
| Section | 一般 |
|---|
| Research Field |
素粒子・核・宇宙線
|
|---|
| Research Institution | Tohoku University |
|---|
Principal Investigator |
YAMAMOTO Hitoshi Tohoku University, Graduate School of Science, Professor (00333782)
|
|---|
| Co-Investigator(Kenkyū-buntansha) |
NAGAMINE Tadashi Tohoku University, Graduate School of Science, Assistant professor (30212111)
TAUCHI Toshiaki Tohoku University, Associate Professor (20154726)
IKEDA Hirokazu Tohoku University, Professor (10132680)
|
|---|
| Project Period (FY) |
2002 – 2005
|
| Project Status |
Completed (Fiscal Year 2005)
|
| Budget Amount *help |
¥29,770,000 (Direct Cost: ¥22,900,000、Indirect Cost: ¥6,870,000)
Fiscal Year 2005: ¥6,890,000 (Direct Cost: ¥5,300,000、Indirect Cost: ¥1,590,000)
Fiscal Year 2004: ¥6,890,000 (Direct Cost: ¥5,300,000、Indirect Cost: ¥1,590,000)
Fiscal Year 2003: ¥6,890,000 (Direct Cost: ¥5,300,000、Indirect Cost: ¥1,590,000)
Fiscal Year 2002: ¥9,100,000 (Direct Cost: ¥7,000,000、Indirect Cost: ¥2,100,000)
|
|---|
| Keywords | linear collider / pixel detector / ASIC / beam profile monitor / 3Dセンサー / ピクセル・センサー / ASIC読み出し回路 / ASICの放射線テスト / リニア・コライダー / ビーム・プロファイル / ビームサイズ測定 / ピクセル読み出し回路 |
|---|
| Research Abstract |
The goal of this project is to develop a silicon pixel detector for measuring the beam profile of a room-temperature linear collider that was proposed by Japan and the United States. First, the proof of principle was demonstrated by simulation. A prototype sensor was designed and produced in collaboration with Sherwood Parker of University of Hawaii. The readout chip was designed by this group and fabricated by ROHM through VDEC. The timing resolution achieved 30ns, and the radiation tolerance was proved up to 2 Mrad using the Co60 source at the engineering department of Tohoku University.
The next step was to produce a readout chip that can be bump bonded to the sensor. In August 2004, however, ITRP (International Technology Recommendation Panel) has decided that the International Linear Collider be based on the super-conducting technology Since the hit count per beam train for the linear collider based on the super-conducting technology is 20 times larger than that based on the room-t
… More
emperature technology, the original circuit design would result in occupancy of order unity. This led us to adopt a scheme where the long beam train is divided to 20 time slices and the counts are read out during the gap of the beam train. The design was completed in 2005 and submitted to VDEC for production of a prototype. The prototype was fabricated and delivered to Tohoku University at the end of 2005. The status report was presented at the International Linear Collider Workshop at Snowmass, Colorado, USA in August 2005. The test system had been developed in parallel with the chip production, and the test revealed a problem at the input polysilicon resister. After extensive tests involving X-ray analysis, Electron Beam Analysis, and Focused Ion Beam, the problem at a few of the input resisters were fixed and a part of functions have been verified. After discussions with companies, it became clear that the reason for the problem was a bug in the program certified by the foundry (TSMC) to check the design rule. We have re-submitted the read out chip after necessary modifications. The design and fabrication of the chip are described in the paper 'Pixelated readout circuit for pair monitor at international linear collider'. In parallel with these studies, a simulation study was performed to see if the beam profile can be measured for the case of a large beam crossing angle. The study found that the measurement is possible even though the accuracy degrades compared to the head-on collision case, and the result has been published as a paper. Less
|
Report
(5 results)
Research Products
(7 results)
-
-
-
[Journal Article] Pixelated readout circuit for pair monitor at international linear collider
Author(s)
Y.Sato, K.Hashimoto, H.Ikeda, K.Ito, A.Miyamoto, T.Nagamine, R.Sasaki, Y.Takubo, T.Toshiaki, H.Yamamoto, Y.Yokoyama
-
Journal Title
IEEE Transactions on Nuclear Science(accepted)
Description
「研究成果報告書概要(和文)」より
Related Report
-
[Journal Article] Pixelated readout circuit for pair monitor at international linear collider
Author(s)
Y.Sato, K.Hashimoto, H.Ikeda, K.Ito, A.Miyamoto, T.Nagamine, R.Sasaki, Y.Takubo, T.Toshiaki, H.Yamamoto, Y.Yokoyama
-
Journal Title
IEEE Transaction on Nuclear Science (to be published)
Description
「研究成果報告書概要(欧文)」より
Related Report
-
-
-
