| Project/Area Number |
14380130
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
計算機科学
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| Research Institution | Tohoku Institute of Technology (2003-2004)
Tohoku University (2002) |
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Principal Investigator |
HIGUCHI Tatsuo Tohoku Institute of Technology, Department of Engineering, Professor, 工学部・電子工学科, 教授 (20005317)
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| Co-Investigator(Kenkyū-buntansha) |
AOKI Takafumi Tohoku University, Graduate School of Information Sciences, Professor, 大学院・情報科学研究科, 教授 (80241529)
佐々木 慶文 石巻専修大学, 理工学部, 講師 (80343440)
本間 尚文 東北大学, 大学院・情報科学研究科, 助手 (00343062)
平塚 眞彦 仙台電波工業高等専門学校, 助手 (80331966)
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| Project Period (FY) |
2002 – 2004
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| Project Status |
Completed (Fiscal Year 2004)
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| Budget Amount *help |
¥13,600,000 (Direct Cost: ¥13,600,000)
Fiscal Year 2004: ¥4,000,000 (Direct Cost: ¥4,000,000)
Fiscal Year 2003: ¥4,800,000 (Direct Cost: ¥4,800,000)
Fiscal Year 2002: ¥4,800,000 (Direct Cost: ¥4,800,000)
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| Keywords | Hardware Algorithms / EDA / Integrated Circuits / Arithmetic Algorithms / Datapaths / Multiple-Valued Logic / Image Processing / Molecular Computers / ハードウェア記述言語 / 算術演算回路 / 進化的計算 / 画像照合 / 分子コンピューティング |
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| Research Abstract |
The present-day VLSI systems are designed on the basis of binary (radix-2) arithmetic algorithms combined with binary logic devices. As the VLSI technology scales down to deep sub-micron geometry, performance bottlenecks caused by increased wiring complexity and delay are becoming significantly severe. In order to overcome the performance bottlenecks, this research project investigates new developments based on a novel computing paradigm called "Beyond-Binary Computing". Listed below are major results of this project:
1.A prototype of Arithmetic Description Language ARITH was developed. We confirmed that the use of ARITH makes possible (i) formal description of arithmetic algorithms including those using unconventional number systems, (ii) formal verification of described arithmetic algorithms, and (iii) translation of arithmetic algorithms to equivalent HDL (Hardware Description Language) codes. Impacts of ARITH were demonstrated through the development of a multiplier module generator. Also, new CAD techniques based on Evolutionary Graph Generation system were developed for designing high-performance beyond-binary arithmetic algorithms.
2.Impacts of multiple-valued current-mode logic technology were demonstrated through the design of field-programmable digital filter ICs. Also, an experimental design environment for practical multiple-valued current -mode logic circuits was developed.
3.Some applications of beyond-binary computing to high-accuracy 2D/3D image measurement techniques were studied.
4.A redox microarray for wire-free circuit integration using artificial catalyst devices, such as enzyme transistors, was developed experimentally. The redox microarray was used to demonstrate some applications of molecular computing, including optimal path planning and image processing.
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