Crystallographic Evaluation of Ultrathin SOI Substrates and Impurity Diffusion Modeling for Nanometer LSIs
Project/Area Number |
14550323
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Research Category |
Grant-in-Aid for Scientific Research (C)
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Allocation Type | Single-year Grants |
Section | 一般 |
Research Field |
電子デバイス・機器工学
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Research Institution | Nagoya Institute of Technology |
Principal Investigator |
ARAI Eisuke Nagoya Institute of Technology, Graduate School of Engineering, Professor, 大学院・工学研究科, 教授 (90283473)
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Co-Investigator(Kenkyū-buntansha) |
ICHIMURA Masaya Nagoya Institute of Technology, Graduate School of Engineering, Professor, 大学院・工学研究科, 教授 (30203110)
KATO Masashi Nagoya Institute of Technology, Graduate School of Engineering, Research Associate, 大学院・工学研究科, 助手 (80362317)
内田 秀雄 名古屋工業大学, 工学部・電気情報工学科, 助手 (10293739)
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Project Period (FY) |
2002 – 2004
|
Project Status |
Completed (Fiscal Year 2004)
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Budget Amount *help |
¥3,600,000 (Direct Cost: ¥3,600,000)
Fiscal Year 2004: ¥600,000 (Direct Cost: ¥600,000)
Fiscal Year 2003: ¥900,000 (Direct Cost: ¥900,000)
Fiscal Year 2002: ¥2,100,000 (Direct Cost: ¥2,100,000)
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Keywords | SOI substrate / buried oxide / new donor / μ-PCD method / carrier density distribution / recombination velocity of point defect density / process simulator / pair diffusion model / SOI / 界面再結合速度 / 発生ライフタイム / B拡散 / P拡散 / 拡散モデル / シリコンLSI / 極薄SOI / 埋込酸化膜 / 不純物拡散 / キャリア分布 / 界面電荷密度 / 耐圧 / 埋込み酸化膜 / ニュードナー / ひ素 / アンチモン |
Research Abstract |
1.Crystalline Quality Evaluation of SOI Substrates (1)Changes of Carrier Density Distribution in SOI Substrates with Annealing Carrier distribution changes in SOI substrates with annealing were measured. The changes depend on both Si layer thickness of SOI substrates and annealing temperature. For Si layer thicker than 1 μm, the inversion layer is generated with annealing near 1000℃ at the buried oxide interface of p-type SOI substrates, while the accumulation layer is generated at the interface of n-type SOI substrates.. For Si layer thinner than 1 μm, n-type donor is generated with annealing of 700-800℃. The donor level is below 0.03eV and the origin of the donor is considered to be due to the oxygen precipitation, i.e., so-called new donor. (2)Electrical Characteristics Evaluation of Buried Oxide (BOX) Interface the carrier recombination velocity of BOX interface was measured using μ-PCD method. The velocity is 500-1800 cm/s which is about 100 times larger than that for the conventional
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interface of Si and thermal silicon oxide. 2.Impurity Diffusion Modeling for SOI Substrates (1)Comparison of B Diffusion Profiles in 3 kinds of Ultrathin SOI Substrates B diffusion profiles in 3 kinds of ultra-thin SOI substrates (SIMOX, UNIBOND and ELTRAN) were compared. The diffusion depths in the SOI substrates were shallower than those in bulk Si and the depth in SIMOX is the shallowest among 3kinds of SOI substrates. These results show the crystalline quality of BOX interface and the recombination velocity of point defects at the interface is the fastest for SIMOX substrates. (2)Accuracy of Process Simulator on the Market and Diffusion Modeling From the B and P predeposition profiles in bulk Si and SOI substrates, diffusion parameters for simulation were extracted. Using the parameters, the drive-in diffusion profiles were simulated using the process simulator on the market and compared with experimental profiles. The experimental profiles are deeper than those simulated, which suggests that the diffusion enhancement mechanism in drive-in process should be taken in the process simulator. Less
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Report
(4 results)
Research Products
(18 results)