| Budget Amount *help |
¥23,270,000 (Direct Cost: ¥17,900,000、Indirect Cost: ¥5,370,000)
Fiscal Year 2018: ¥6,500,000 (Direct Cost: ¥5,000,000、Indirect Cost: ¥1,500,000)
Fiscal Year 2017: ¥5,330,000 (Direct Cost: ¥4,100,000、Indirect Cost: ¥1,230,000)
Fiscal Year 2016: ¥5,200,000 (Direct Cost: ¥4,000,000、Indirect Cost: ¥1,200,000)
Fiscal Year 2015: ¥6,240,000 (Direct Cost: ¥4,800,000、Indirect Cost: ¥1,440,000)
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| Outline of Final Research Achievements |
A time-of-flight range CMOS image sensor with sub-100-um range resolution has been developed. By using a lateral electric charge modulation, a three-tap lock-in pixel with photocurrent response of several hundred picoseconds have been developed. To suppress the low-frequency jitter in the light trigger that limits the range resolution, we have developed a novel technique using reference plane sampling (RPS) with a reference pixel array embedded in the same focal plane of the main pixel array. This technique improves the range resolution significantly. To reduce the clock skew of the gating clocks, a column-parallel digital delay-locked loop (DLL) with a dual clock tree is implemented with a short calibration time of approximately 42 us.
The prototype range imager with 192 x 4 effective pixels is implemented in a 0.11-um CMOS image sensor technology. Using the RPS, a range resolution of 64 um has been achieved, corresponding to a 430-fs time resolution with a 25-mm range.
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