IC Test Method Based on Charge Volume Injected from a Power Supply Circuit within a Timing Window
| Project/Area Number |
15K12002
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| Research Category |
Grant-in-Aid for Challenging Exploratory Research
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| Allocation Type | Multi-year Fund |
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| Research Field |
Computer system
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| Research Institution | The University of Tokushima |
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Principal Investigator |
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| Project Period (FY) |
2015-04-01 – 2017-03-31
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| Project Status |
Completed (Fiscal Year 2016)
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| Budget Amount *help |
¥2,860,000 (Direct Cost: ¥2,200,000、Indirect Cost: ¥660,000)
Fiscal Year 2016: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2015: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
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| Keywords | IC検査 / 電流テスト / 電荷注入 / 断線故障 / 電気検査 / 欠陥検出 / IC / 断線 / 短絡 / 電荷量 |
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| Outline of Final Research Achievements |
ICs are tested by means of supply current supplied from a DC voltage source to them, since supply currents depend on open defects and short ones that occur in ICs. The test method is called a supply current test method. Larger change occurs in the charge volume supplied from a power supply source circuit within a specified timing window than in a supply current due to the defects. No test method had not been proposed to test ICs by means of the charge volume. We have developed a supply current test method based on the volume of charge supplied from a power supply circuit, together of its supply source circuit and the test input generation algorithm. We show by experiments and simulations that open defects that cannot be detected by measuring output signals of an IC can be detected by the test method.
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Report
(3 results)
Research Products
(11 results)
