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IC Test Method Based on Charge Volume Injected from a Power Supply Circuit within a Timing Window

Research Project

Project/Area Number 15K12002
Research Category

Grant-in-Aid for Challenging Exploratory Research

Allocation TypeMulti-year Fund
Research Field Computer system
Research InstitutionThe University of Tokushima

Principal Investigator

Hashizume Masaki  徳島大学, 大学院理工学研究部, 教授 (40164777)

Project Period (FY) 2015-04-01 – 2017-03-31
Project Status Completed (Fiscal Year 2016)
Budget Amount *help
¥2,860,000 (Direct Cost: ¥2,200,000、Indirect Cost: ¥660,000)
Fiscal Year 2016: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2015: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
KeywordsIC検査 / 電流テスト / 電荷注入 / 断線故障 / 電気検査 / 欠陥検出 / IC / 断線 / 短絡 / 電荷量
Outline of Final Research Achievements

ICs are tested by means of supply current supplied from a DC voltage source to them, since supply currents depend on open defects and short ones that occur in ICs. The test method is called a supply current test method. Larger change occurs in the charge volume supplied from a power supply source circuit within a specified timing window than in a supply current due to the defects. No test method had not been proposed to test ICs by means of the charge volume. We have developed a supply current test method based on the volume of charge supplied from a power supply circuit, together of its supply source circuit and the test input generation algorithm. We show by experiments and simulations that open defects that cannot be detected by measuring output signals of an IC can be detected by the test method.

Report

(3 results)
  • 2016 Annual Research Report   Final Research Report ( PDF )
  • 2015 Research-status Report
  • Research Products

    (11 results)

All 2017 2016 2015 Other

All Int'l Joint Research (1 results) Journal Article (4 results) (of which Int'l Joint Research: 2 results,  Peer Reviewed: 4 results,  Acknowledgement Compliant: 4 results) Presentation (5 results) (of which Int'l Joint Research: 1 results) Remarks (1 results)

  • [Int'l Joint Research] National Taiwan Univ. of Sci. and Tech.(Taiwan)

    • Related Report
      2016 Annual Research Report
  • [Journal Article] A Built-in Test Circuit for Injected Charge Tests of Open Defects in CMOS ICs2016

    • Author(s)
      Kouhei Ohtani, Daisuke Suga, Hiroyuki Yotsuyanagi and Masaki Hashizume
    • Journal Title

      Proc. of International Technical Conference on Circuits/Systems, Computers and Communications 2016

      Volume: - Pages: 291-294

    • Related Report
      2016 Annual Research Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] A Power Supply Circuit for Interconnect Tests Based on Injected Charge Volume of 3D IC2016

    • Author(s)
      Kouhei Ohtani, Masaki Hashizume, Daisuke Suga, Hiroyuki Yotsuyanagi and Shyue-Kung Lu
    • Journal Title

      Proc. of IEEE CPMT Symposium Japan 2016

      Volume: - Pages: 139-140

    • Related Report
      2016 Annual Research Report
    • Peer Reviewed / Int'l Joint Research / Acknowledgement Compliant
  • [Journal Article] Electrical Interconnect Test Method of 3D ICs by Injected Charge Volume2015

    • Author(s)
      Daisuke Suga, Masaki Hashizume, Hiroyuki Yotsuyanagi and Shyue-Kung Lu
    • Journal Title

      Proc. of IEEE 3D System Integration Conference 2015

      Volume: _ Pages: TS8.19.1-TS8.19.6

    • DOI

      10.1109/3dic.2015.7334588

    • Related Report
      2015 Research-status Report
    • Peer Reviewed / Int'l Joint Research / Acknowledgement Compliant
  • [Journal Article] Electrical Test for Open Defects in CMOS ICs by Injected Charge2015

    • Author(s)
      Daisuke Suga, Hiroyuki Yotsuyanagi, Hiroyuki Yotsuyanagi and Masaki Hashizume
    • Journal Title

      Proc. of International Technical Conference on Circuits/Systems, Computers and Communications 2015

      Volume: _ Pages: 653-656

    • Related Report
      2015 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Presentation] 電荷注入回数によるIC間配線の試験回路2017

    • Author(s)
      大谷 航平, 菅 大介, 四柳 浩之, 橋爪 正樹
    • Organizer
      第31回エレクトロニクス実装学会春季講演大会
    • Place of Presentation
      慶應義塾大学(神奈川県横浜市)
    • Year and Date
      2017-03-06
    • Related Report
      2016 Annual Research Report
  • [Presentation] 電荷注入量による断線不良検出の回路規模に対する影響調査2016

    • Author(s)
      大谷 航平, 菅 大介, 四柳 浩之, 橋爪 正樹
    • Organizer
      電気関係学会四国支部連合大会
    • Place of Presentation
      徳島大学(徳島県徳島市)
    • Year and Date
      2016-09-17
    • Related Report
      2016 Annual Research Report
  • [Presentation] IDDT出現時間を用いる断線故障検査法の伝搬不能故障検出に対する有効性調査2016

    • Author(s)
      三好 大地, 四柳 浩之, 橋爪 正樹
    • Organizer
      電気関係学会四国支部連合大会
    • Place of Presentation
      徳島大学(徳島県徳島市)
    • Year and Date
      2016-09-17
    • Related Report
      2016 Annual Research Report
  • [Presentation] A Power Supply Circuit for Detecting Open Defects in SoCs by Amount of Injected Charge2016

    • Author(s)
      Masaki Hashizume,Kohei Ohtani,Daisuke Suga,Hiroyuki Yotsuyanagi and Shyue-Kung Lu
    • Organizer
      Taiwan and Japan Conference on Circuits and Systems(TJCAS2016)
    • Place of Presentation
      National Cheng Kung University(Tainan,Taiwan)
    • Year and Date
      2016-07-31
    • Related Report
      2016 Annual Research Report
    • Int'l Joint Research
  • [Presentation] 電荷注入量によるIC間配線の電流テストの可能性評価2015

    • Author(s)
      菅 大介, 四柳 浩之, 橋爪 正樹
    • Organizer
      電気関係学会四国支部連合大会講演論文集
    • Place of Presentation
      高知工科大学(高知県香美市)
    • Year and Date
      2015-09-26
    • Related Report
      2015 Research-status Report
  • [Remarks] 研究成果紹介

    • URL

      http://tameone.ee.tokushima-u.ac.jp/~tume/RSP/charge/

    • Related Report
      2016 Annual Research Report 2015 Research-status Report

URL: 

Published: 2015-04-16   Modified: 2022-02-16  

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