Study on physical models for understanding the properties of strained-Si MOS Transistors
Project/Area Number |
16206029
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Research Category |
Grant-in-Aid for Scientific Research (A)
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Allocation Type | Single-year Grants |
Section | 一般 |
Research Field |
Electronic materials/Electric materials
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Research Institution | The University of Tokyo |
Principal Investigator |
TAKAGI Shinichi The University of Tokyo, Graduate School of Frontiers Science, Professor (30372402)
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Project Period (FY) |
2004 – 2006
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Project Status |
Completed (Fiscal Year 2006)
|
Budget Amount *help |
¥48,100,000 (Direct Cost: ¥37,000,000、Indirect Cost: ¥11,100,000)
Fiscal Year 2006: ¥8,060,000 (Direct Cost: ¥6,200,000、Indirect Cost: ¥1,860,000)
Fiscal Year 2005: ¥18,590,000 (Direct Cost: ¥14,300,000、Indirect Cost: ¥4,290,000)
Fiscal Year 2004: ¥21,450,000 (Direct Cost: ¥16,500,000、Indirect Cost: ¥4,950,000)
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Keywords | strained-Si / MOSFET / mobility / tunneling current / Coulomb scattering / gate current / substrate current / subband structure / バンド構造 / 一軸ひずみ / 正孔 / SiGe / 散乱機構 |
Research Abstract |
The effects of the channel strain on the electrical characteristics of MOSFETs have not been fully understood yet in spite of the importance. Thus, the establishment of the physical models to describe the electrical properties is of paramount importance. In this study, following issues have been clarified by the analyses using bi-axial tensile strain Si MOSFETs. * It has been found that inversion-layer electron and hole mobility do hold the universality against the effective field with the value of η of 1/2 and 1/3, respectively, as similar with unstrained-Si n-and p-MOSFETs. * It has been found that gate current of n-MOSFETs under the positive bias, attributed to tunneling of electrons from the inversion layers, decreases with an increase in bi-axial tensile strain. We have demonstrated that this tunnel current reduction is quantitatively explained by the increase in the barrier height between Si and SiO2, caused by the lowering of the conduction band edge due to the tensile strain. * It has been found that the density and the energy distribution of interface states, generated by FN stress injection, do not change with applying tensile strain to channels, while the threshold voltage shift of n-MOSFETs after the stressing does change with strain because of the reduction in the band bending under the inversion condition in strained-Si nMOSFETs. * While electron mobility limited by Coulomb scattering due to substrate impurities in Si n-MOSFETs increases with an increase in tensile strain, the electron mobility limited by Coulomb scattering due to interface charges does decrease. These results are explained by the reduction in the averaged conductivity mass and the increase in the scattering probability with interface Coulomb scattering centers, both of which are provided by the increase in the occupancy of the 2-fold valley electrons due to applying tensile strain.
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Report
(4 results)
Research Products
(21 results)
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[Journal Article] Carrier-transport-enhanced channel CMOS for improved power consumption and performance2008
Author(s)
S.Takagi, T.Irisawa, T.Tezuka, T.Numata, S.Nakaharai, N.Hirashita, Y.Moriyama, K.Usuda, E.Toyoda, S.Dissanayake, M.Shichijo, R.Nakane, S.Sugahara, M.Takenaka and N.Suiama
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Journal Title
IEEE Transactionon Eectron Devices Vol.55,Issue.1
Pages: 21-39
Description
「研究成果報告書概要(和文)」より
Related Report
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[Journal Article] Carrier-transport-enhanced channel CMOS for improved power consumption and performance2008
Author(s)
S. Takagi, T. Irisawa, T. Tezuka, T. Numata, S. Nakaharai, N. Hirashita, Y. Moriyama, K. Usuda, E. Toyoda, S. Dissanayake, M. Shichijo, R. Nakane, S. Sugahara, M. Takenaka and N. Sugiyama
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Journal Title
IEEE Trans. Electron Devices Vol.55, Issue. 1
Pages: 21-39
Description
「研究成果報告書概要(欧文)」より
Related Report
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[Journal Article] Performance Enhancement of Partially and Fully Depleted Strained-S0I MOSFETs2006
Author(s)
T.Numata, T.Irisawa, T.Tezuka, J.Koga, N.Hirashita, K.Usuda, E.Toyoda, Y.Miyamura, A.Tanabe, N.Sugiyama and S.Takagi
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Journal Title
IEEE Transaction on Eectron Devices Vol.52,Issue.8
Pages: 1030-1038
Description
「研究成果報告書概要(和文)」より
Related Report
Peer Reviewed
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[Journal Article] Performance Enhancement of Partially and Fully Depleted Strained-SOI MOSFETs2006
Author(s)
T. Numata, T. Irisawa, T. Tezuka, J. Koga, N. Hirashita, K. Usuda, E. Toyoda, Y. Miyamura, A. Tanabe, N. Sugiyama and S. Takagi
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Journal Title
IEEE Trans. Electron Devices Vol.53, Issue. 5
Pages: 1030-1038
NAID
Description
「研究成果報告書概要(欧文)」より
Related Report
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[Journal Article] Performance Enhancement of Partially and Fully Depleted Strained-SOIMOSFETs2006
Author(s)
T.Numata, T.Irisawa, T.Tezuka, J.Koga, N.Hirashita, K.Usuda, E.Toyoda, Y.Miyamura, A.Tanabe, N.Sugiyama, S.Takagi
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Journal Title
IEEE Transaction on Eectron Devices vol.53, no.5
Pages: 1030-1038
NAID
Related Report
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