Research for ultra-fast operation of InP HBT by ballistic transportation in collector
| Project/Area Number |
16360170
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Electron device/Electronic equipment
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| Research Institution | Tokyo Institute of Technology |
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Principal Investigator |
MIYAMOTO Yasuyuki Tokyo Institute of Technology, Department of Physical Electronics, Assoc.Prof., 大学院理工学研究科, 助教授 (40209953)
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| Co-Investigator(Kenkyū-buntansha) |
MACHIDA Nobuya Tokyo Institute of Technology, Department of Physical Electronics, Assistant Prof., 大学院理工学研究科, 助手 (70313335)
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| Project Period (FY) |
2004 – 2006
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| Project Status |
Completed (Fiscal Year 2006)
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| Budget Amount *help |
¥14,900,000 (Direct Cost: ¥14,900,000)
Fiscal Year 2006: ¥5,100,000 (Direct Cost: ¥5,100,000)
Fiscal Year 2005: ¥5,100,000 (Direct Cost: ¥5,100,000)
Fiscal Year 2004: ¥4,700,000 (Direct Cost: ¥4,700,000)
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| Keywords | Heterojunction bipolar transistor / InP / Electron beam lithography / Ballistic electron / Collector capacitance / Narrow emitter / Collector transit time / Kirk effect / ヘテロ接合バイポーラトランジスタ |
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| Research Abstract |
Obtained results in this study are as follows :
Electron velocity in the collector was estimated by Monte Carlo simulation. In the heterojunction bipolar transistor with 100 nm thick collector, electron velocity is over 4x10^7cm/s at first 40 nm, but the velocity is less than 2x10^7cm/s at final 20 nm. With base thickness of 25 nm, estimated cutoff frequency is about 630 GHz.
Thus we propose hot electron transistors with intrinsic semiconductor as propagation region for ballistic transportation and thermionic hetero-launcher for high drivability controlled by insulated gate. Electron speed in the collector is over 7x10^7cm/s and cutoff frequency over 1 THz is estimated when collector current density is over 1000 kA/cm^2.
Heterojunction bipolar transistors with 0.1um wide buried metal wires showed 0.6 fF as total collector capacitance. To our knowledge, this is the smallest capacitance. However, electron flux from side of the wire limits further improvement. Thus we proposed heterojunction bipolar transistors with SiO_2 wire under base contact region. 200-nm-thick wires were buried in heterojunction bipolar transistor structure with flat hetero-interface. In the transistors with SiO_2 wire, no serious degradation was observed in DC measurements. Hot electron transistors with insulated gate and thermionic hetero-launcher were fabricated. Good isolation of gate and collector current control by gate bias were confirmed.
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Report
(4 results)
Research Products
(33 results)
