| Budget Amount *help |
¥15,340,000 (Direct Cost: ¥11,800,000、Indirect Cost: ¥3,540,000)
Fiscal Year 2019: ¥3,380,000 (Direct Cost: ¥2,600,000、Indirect Cost: ¥780,000)
Fiscal Year 2018: ¥4,030,000 (Direct Cost: ¥3,100,000、Indirect Cost: ¥930,000)
Fiscal Year 2017: ¥3,770,000 (Direct Cost: ¥2,900,000、Indirect Cost: ¥870,000)
Fiscal Year 2016: ¥4,160,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥960,000)
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| Outline of Final Research Achievements |
For exponential function, logarithmic function, and sine / cosine function, we have developed calculation methods suitable for FPGA implementation which realize correct rounding, by combining high-radix STL or ultra-high-radix CORDIC with low-order polynomial approximation and table-based rounding error correction. We have shown construction methods of dedicated circuits consisting of look-up tables and rectangular multipliers on FPGA.
For inverse sine / inverse cosine function, we have newly proposed a high-radix CORDIC method, and have shown a construction method of a dedicated circuit consisting of look-up tables and rectangular multipliers on FPGA.
We have developed a method of constructing an adder that can detect an output error due to a single failure in the circuit during normal operation and can easily detect a failure in the circuit.
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