Verification of a clocking scheme that enables operation based on typical-case delays
| Project/Area Number |
16H02797
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Computer system
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| Research Institution | National Institute of Informatics |
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Principal Investigator |
GOSHIMA Masahiro 国立情報学研究所, アーキテクチャ科学研究系, 教授 (90283639)
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| Co-Investigator(Kenkyū-buntansha) |
塩谷 亮太 東京大学, 情報理工学系研究科, 准教授 (10619191)
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| Project Period (FY) |
2016-04-01 – 2019-03-31
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| Project Status |
Completed (Fiscal Year 2019)
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| Budget Amount *help |
¥16,770,000 (Direct Cost: ¥12,900,000、Indirect Cost: ¥3,870,000)
Fiscal Year 2018: ¥5,200,000 (Direct Cost: ¥4,000,000、Indirect Cost: ¥1,200,000)
Fiscal Year 2017: ¥4,810,000 (Direct Cost: ¥3,700,000、Indirect Cost: ¥1,110,000)
Fiscal Year 2016: ¥6,760,000 (Direct Cost: ¥5,200,000、Indirect Cost: ¥1,560,000)
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| Keywords | ディジタル回路 / 二相ラッチ / タイミング故障検出 / クロッキング / 製造ばらつき / 半導体 / マイクロアーキテクチャ / クロッキング方式 / FPGA / 半導体プロセス / コンピュータアーキテクチャ |
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| Outline of Final Research Achievements |
As the feature size of semiconductor manufacturing is decreased, random variation in the delays of the circuit elements is becoming dominant. To tackle this problem, we have proposed a clocking scheme that enables dynamic time borrowing. In this scheme, if the delay of a stage overruns the cycle time, the overtime can be carried over to the next stage. As a result, the random variation in the delays of the elements is averaged by the Law of Large Numbers, and operations based on (a clock period derived by) the typical-case delays is realized. In this research, we mainly developed a tool to apply this scheme, and a RISC-V processor implemented in a programmable device.
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| Academic Significance and Societal Importance of the Research Achievements |
半導体の指数関数的な性能向上を支えてきたムーアの法則の終焉が囁かれている一方で，その科学的な根拠であるデナード・スケーリングは，今世紀の初めには既に終焉を迎えた．その原因の一つには，半導体製造プロセスの微細化に伴い，素子遅延のランダムなばらつきが支配的となっていることが挙げられる．これは，素子のサイズが原子のサイズに近づいたためで，半導体技術のみによって解決することは本質的に難しい．提案のクロッキング方式は，回路とアーキテクチャ技術によってこのランダムばらつきの問題に対処するものである．
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Report
(4 results)
Research Products
(11 results)
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[Presentation] An Open Source FPGA-Optimized Out-of-Order RISC-V Soft Processor2019
Author(s)
Susumu Mashimo, Akifumi Fujita, Reoma Matsuoz, Seiya Akaki, Akifumi Fukuda, Toru Koizumi, Junichiro Kadomoto, Hidetsugu Irie, Masahiro Goshima, Koji Inoue, Ryota Shioya
Organizer
Int'l Conf. on Field Programmable Technology (FPT)
Related Report
Int'l Joint Research
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