Development of Cu Interconnects for 20nm Technology Node LSI
| Project/Area Number |
17206071
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| Research Category |
Grant-in-Aid for Scientific Research (A)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Structural/Functional materials
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| Research Institution | Ibaraki University |
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Principal Investigator |
ONUKI Jin Ibaraki University, College of Engineering, Professor (70315612)
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| Co-Investigator(Kenkyū-buntansha) |
TOMOTA Yo Ibaraki University, College of Engineering, Professor (90007782)
SASAJIMA Yasushi Ibaraki University, College of Engineering, Associate Professor (80187137)
AOYAMA Takasi Akita Prefectural University, システム科学技術学部, Professor (80363737)
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| Project Period (FY) |
2005 – 2007
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| Project Status |
Completed (Fiscal Year 2007)
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| Budget Amount *help |
¥50,830,000 (Direct Cost: ¥39,100,000、Indirect Cost: ¥11,730,000)
Fiscal Year 2007: ¥7,670,000 (Direct Cost: ¥5,900,000、Indirect Cost: ¥1,770,000)
Fiscal Year 2006: ¥8,580,000 (Direct Cost: ¥6,600,000、Indirect Cost: ¥1,980,000)
Fiscal Year 2005: ¥34,580,000 (Direct Cost: ¥26,600,000、Indirect Cost: ¥7,980,000)
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| Keywords | LSI / Low Resistivity / Grain Size / Cu Interconnects / High-purity Plating Material / Cu Plating / Oxygen / 酸素濃度 / めっき材料 / 分子動力学法 / 結晶粒径 / 密着性 / 耐エレクトロマイグレーション性 / LSI用Cu配線 / 配線抵抗率 / TEG / Cu配線形成 / 硫酸銅純度 / 平均結晶粒径 / 標準偏差 / ナノスクラッチ試験 / エレクトロマイグレーション / 技術ノード35nm / 配線の低抵抗化 / 配線の密着性向上 |
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| Research Abstract |
Copper (Cu) has long been used as the wire material for high performance ultra large-scale integrated circuits (ULSIs). However, the significant increase in the resistivity of Cu wire with line widths less than 100 nm is a critical issue^< (1-3)>. In order to lower resistivity, both the coarsening of the grain sizes and the reduction in the thickness of high-resistivity barrier metals in Cu wires are crucial. However, a powerful grain size coarsening process to reduce electron scattering has not yet been developed up to now. It was recently reported that contamination in Cu films depress their grain growth during annealing^< (6)>.
This implies that low resistivity Cu wires could be created if high-purity very narrow wires can be formed. Hence, we have focused our attention on the purification of Cu wires and the investigation of a forming process using ultra-high purity 9N-Cu anode and high purity 6N-CuSO_4・5H_2O electrolyte.
Using the above high purity process, we have realized 50 nm wide Cu wires with about 21% lower resistivity than those made with the conventional process. It was also found that the low resistivity Cu wires formed with the new process have large grain sizes with a lower spread, and a much smaller amount of oxygen than those made with the conventional process.
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Report
(4 results)
Research Products
(50 results)
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[Journal Article] Microstructure of 50nm Cu lnterconnects along the Longitudinal Direction2007
Author(s)
K.P., Khoo・J., Onuki・T., Nagano・S., Tashiro・Y., Chonan・H., Akahoshi・T., Haba・T., Tobita・M., Chiba・K., lshikawa
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Journal Title
Material.Trans. 48
Pages: 2703-2707
Description
「研究成果報告書概要(和文)」より
Related Report
Peer Reviewed
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