Formation of Buried Oxide Layer in Epitaxial Silicon Wafers
| Project/Area Number |
17560014
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Applied materials science/Crystal engineering
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| Research Institution | Fukui University of Technology |
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Principal Investigator |
UMENO Masataka Fukui University of Technology, Faculty of Engineering, Professor, 工学部, 教授 (50029071)
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| Co-Investigator(Kenkyū-buntansha) |
SHIMURA Takayoshi Osaka University, Faculty of Engineering, Associate Professor, 大学院・工学研究科, 准教授 (90252600)
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| Project Period (FY) |
2005 – 2006
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| Project Status |
Completed (Fiscal Year 2006)
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| Budget Amount *help |
¥3,400,000 (Direct Cost: ¥3,400,000)
Fiscal Year 2006: ¥1,400,000 (Direct Cost: ¥1,400,000)
Fiscal Year 2005: ¥2,000,000 (Direct Cost: ¥2,000,000)
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| Keywords | SOI / Silicon / Buried Oxide / Thermal Oxidation / MBE / SOIウエーハ / SIMOX / 結晶工学 / LSI基板 / SOI |
|---|
| Research Abstract |
The probable formation of buried oxide layer in a silicon wafer by a new method which would lead to the production of SOI wafers for the cutting-edge ULSIs is studied. High graded SOI wafers for the ULSI devices are produced either by the wafer bonding method or oxygen ion implantation followed by high temperature annealing. However, both methods require highly sophisticated production techniques such as the smart cut technique in bonding method and the Itox technique in SIMOX (Separation by Implanted Oxygen) wafer and hence the prices of SOI wafers are high limiting the preventing the wide use of the SOI wafers in usual ULSI devices. This study aims to produce a buried oxide without using either bonding or oxygen ion implantation. As in the SIMOX wafers the buried oxide is formed during the high temperature annealing process at the damage layer formed by ion implantation, we produced the damage layer by MBE method. There are some methods to introduce a damage layer in the epitaxially grown Si crystals and we employed two methods in this study. That is, (a) a change of the substrate temperature was introduced during the MBE growth and (b) 1 or 2 Ge layers are sandwiched in MBE silicon crystal. The specimens were annealed in various conditions in oxidizing atmospheres and investigated by spectroscopic ellipsometry and by depth analyses with SIMS. The expected oxide layer was not found at present. It is probable that the damage layers produced above methods are easily relaxed in the early stage of the annealing and we try to produce more robast damage layer having atoms with low diffusion velocities in silicon crystals.
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Report
(3 results)
Research Products
(16 results)
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[Journal Article] Ordered Structure in the Thermal Oxide Layer on Silicon Substrates2005
Author(s)
T.Shimura, E.Mishima, H.Watanabe, K.Yasutake, M.Umeno, K.Tatsumura, T.Watanabe, I.Ohdomari, K.Yamada, S.Kamiyama, Y.Akasaka, Y.Nara, K.Nakamura
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Journal Title
ECS Transactions 1-1
Pages: 39-48
Description
「研究成果報告書概要(和文)」より
Related Report
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[Journal Article] Ordered Structure in the Thermal Oxide Layer on Silicon Substrates2005
Author(s)
T.Shimura, E.Mishima, H.Watanabe, K.Yasutake, M.Umeno, K.Tatsumura, T.Watanabe, I.Ohdomari, K.Yamada, S.Kamiyama, Y.Akasaka, Y.Nara, K.Nakamura
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Journal Title
ECS Transactions Vol.1 No1
Pages: 39-48
Description
「研究成果報告書概要(欧文)」より
Related Report
-
-
[Journal Article] Ordered Structure in the Thermal Oxide Layer on Silicon Substrates2005
Author(s)
T.Shimura, E.Mishima, H.Watanabe, K.Yasutake, M.Umeno, K.Tatsumura, T.Watanabe, I.Ohdomari, K.Yamada, S.Kamiyama, Y.Akasaka, Y.Nara, K.Nakamura
-
Journal Title
ECS Transactions 1(1)
Pages: 39-48
Related Report
