Simulation of Widegap Semiconductor Devices
| Project/Area Number |
17560317
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Electron device/Electronic equipment
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| Research Institution | Shibaura Institute of Technology |
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Principal Investigator |
HORIO Kazushige Shibaura Institute of Technology, Faculty of Systems Engineering, Professor, システム工学部, 教授 (10165590)
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| Project Period (FY) |
2005 – 2006
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| Project Status |
Completed (Fiscal Year 2006)
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| Budget Amount *help |
¥3,300,000 (Direct Cost: ¥3,300,000)
Fiscal Year 2006: ¥1,100,000 (Direct Cost: ¥1,100,000)
Fiscal Year 2005: ¥2,200,000 (Direct Cost: ¥2,200,000)
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| Keywords | AlGaN / GaN HEMT / current collapse / drain lag / gate lag / trap / buffer layer / device simulation / A1GaN / GaN / 電解効果トランジスタ / 電流スランプ |
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| Research Abstract |
Although many experimental results are reported on current collapse and slow current transients (gate lag and drain lag) in AlGaN/GaN HEMTs, few theoretical works are performed. Therefore, we have made two-dimensional analysis of AlGaN/GaN HEMTs in which a deep donor and a deep acceptor are considered in the buffer layer, and found that lag phenomena and current collapse could be reproduced. Particularly, it is shown that gate lag is correlated with relatively high source access resistance of AlGaN/GaN HEMTs, and that drain lag could be a major cause of current collapse. It is also shown that current collapse is more pronounced when the deep-acceptor density is higher and when an off-state drain voltage is higher. It is concluded that to minimize current collapse in AlGaN/GaN HEMTs, an acceptor density in the buffer layer should be made low, although current cutoff behavior may be degraded when the gate length is short.
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Report
(3 results)
Research Products
(12 results)
