| Project/Area Number |
17H01713
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Computer system
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| Research Institution | Kyoto University |
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Principal Investigator |
Sato Takashi 京都大学, 情報学研究科, 教授 (20431992)
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| Co-Investigator(Kenkyū-buntansha) |
廣本 正之 京都大学, 情報学研究科, 講師 (60718039)
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| Project Period (FY) |
2017-04-01 – 2020-03-31
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| Project Status |
Completed (Fiscal Year 2019)
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| Budget Amount *help |
¥18,590,000 (Direct Cost: ¥14,300,000、Indirect Cost: ¥4,290,000)
Fiscal Year 2019: ¥7,020,000 (Direct Cost: ¥5,400,000、Indirect Cost: ¥1,620,000)
Fiscal Year 2018: ¥6,110,000 (Direct Cost: ¥4,700,000、Indirect Cost: ¥1,410,000)
Fiscal Year 2017: ¥5,460,000 (Direct Cost: ¥4,200,000、Indirect Cost: ¥1,260,000)
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| Keywords | チップID / 経年劣化 / 集積回路設計 / 認証 / 暗号 / 個体識別 / 暗号・認証 / 個体認識 / 集積回路 / 暗号・認証等 |
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| Outline of Final Research Achievements |
The response of chip-ID circuits, which utilize unavoidable characteristic variation during chip fabrication for individual identification, should not change with time. However, it may change due to the degradation of transistors that compose the ID circuits. In this study, the dominant factors of characteristic variation were clarified through the measurement of the aging variation of the transistors, and simulation model as well as circuit-design environment that consider device-aging have been defined. In addition, robust chip ID circuits with smaller output-value fluctuation against temporal characteristic variation of transistors has been newly designed.
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| Academic Significance and Societal Importance of the Research Achievements |
半導体回路の応用は広く、社会情報インフラの構築等、我々の生活において不可欠となっている。それ故に、半導体回路の突発的な故障は、致命的事象にも直結し得る。本研究で扱うチップID回路は、特性ばらつきをメリットと捉えてチップの個体識別等に活用する回路であり、安全な情報社会を実現するためのキーデバイスの一つである。特性変動を考慮したトランジスタモデルは、回路動作に伴う特性劣化の定量的評価、回路の個体識別、および模造品の指摘や故障の予知を可能とする技術等に広く活用できる。また、チップID回路等、特性変動に対し耐性の高い回路の設計が可能となるため、安全、安心な社会の創生に貢献する。
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