Precise structure control of 3-dimensional integration CMOS using high mobility materials through layer transfer

• Project/Area Number: 17H06148
• Research Category: Grant-in-Aid for Scientific Research (S)
• Allocation Type: Single-year Grants
• Research Field: Electronic materials/Electric materials
• Research Institution: The University of Tokyo
• Principal Investigator: 高木 信一 東京大学, 大学院工学系研究科(工学部), 教授 (30372402)
• Co-Investigator(Kenkyū-buntansha): 前田 辰郎 国立研究開発法人産業技術総合研究所, エレクトロニクス・製造領域, 研究主幹 (40357984) ; 入沢 寿史 国立研究開発法人産業技術総合研究所, エレクトロニクス・製造領域, 主任研究員 (40759940)
• Project Period (FY): 2017-05-31 – 2022-03-31
• Project Status: Granted (Fiscal Year 2021)
• Budget Amount: ¥206,570,000 (Direct Cost: ¥158,900,000、Indirect Cost: ¥47,670,000); Fiscal Year 2021: ¥33,540,000 (Direct Cost: ¥25,800,000、Indirect Cost: ¥7,740,000); Fiscal Year 2020: ¥32,240,000 (Direct Cost: ¥24,800,000、Indirect Cost: ¥7,440,000); Fiscal Year 2019: ¥34,710,000 (Direct Cost: ¥26,700,000、Indirect Cost: ¥8,010,000); Fiscal Year 2018: ¥39,910,000 (Direct Cost: ¥30,700,000、Indirect Cost: ¥9,210,000); Fiscal Year 2017: ¥66,170,000 (Direct Cost: ¥50,900,000、Indirect Cost: ¥15,270,000)
• Keywords: MOSFET / ゲルマニウム / III-V族半導体 / Ge / III-V / III-V半導体

Outline of Annual Research Achievements

(1) layer transferによるチャネル形成技術・・・smart cut法により形成した(111)GOI構造を用いてnMOSFETの作製を行い、素子動作に成功すると共に、(100)GOIと比べて高い電子移動度が得られることを実証した。また、適切な組成のSiGeSn混晶はGeに対して高いエッチング選択性があることを明らかにし、IV族元素のみのGe格子整合系ドナー基板からのELOが可能であること示した。III-V-OIに関しては、(111)InAs-OIチャネルの薄膜化に伴う電子のＬ点遷移を利用した移動度向上技術を提案し、smart cutを用いた(111)InAs-OI nMOSFETにより、本コンセプトを実証した。
(2) 低温SD形成と3次元CMOSコテクティビティ技術・・・極めて低いコンタクト抵抗評価を可能にする素子を提案して、Ni-InAs合金メタルSDとInAs-OIとのコンタクト抵抗を測定し、極薄InAsチャネルに対しても低コンタクト抵抗が実現されることを明らかにした。また、CMOS積層のプロトタイプとして、BCBを介したGe層ドナー基板の接合とELOによるGe層の転写を繰り返し実施し、Si基板上にGe層を2層積層させることに成功した。
(3) 高品質MOS界面形成技術・・・実用上重要なSiGe MOS界面特性向上に関して検討を進め、TiN/Y2O3/SiGeゲートスタック構造、Y2O3堆積前のTMA処理、450℃程度の高温のpost metallization annealingを組み合わせることで、Ge組成によらず低い界面準位密度が実現できること、その機構としてTiN/Y2O3スタックによるMOS界面層中のGe-Oボンドのscavenging効果に加え、Yの界面層への拡散による界面欠陥の終端効果が重要であることを明らかにした。

Current Status of Research Progress

2: Research has progressed on the whole more than it was originally planned.

Reason

(1) layer transferによるチャネル形成技術・・・GOIチャネルに対しては、smart cut法と酸化濃縮法及びデジタルエッチング技術により、GOI高品質化、(111)GOI実現、ひずみ制御などにより、nMOSFET、pMOSFET共に、薄膜チャネルで高い素子性能を持つ素子を実現するための要素技術が揃いつつある。一方ELO法については、Geに格子整合するSiGeSn (Si 25%以上)膜は、GeとのH2O2系でのエッチング選択性が極めて高いことからエッチング障壁層として使用でき、結果としてGe格子整合系基板からのELOを行う準備が整った。III-V-OIチャネルに関しては、smart cut法とデジタルエッチングを用いることで、高性能かつ極薄膜のInAs-OI nMOSFETの実現が視野に入った。ELO法では、想定していたGaSb基板上AlSb犠牲層とInAsのエピ構造では、表面平坦性の劣化により貼り合わせが困難になる事から、今後ドナーエピ基板の最適化による解決を図る。
(2) 低温SD形成と3次元CMOSコテクティビティ技術・・・低温SD形成に関しては、Ni-InAs合金によるSDの薄膜InAsチャネルに対するコンタクト抵抗を定量的に決定出来る素子構造を確立し、その低コンタクト抵抗性を実証した。3次元集積に関しては、BCBとGe ELOによる多段化により、Si基板上にGe層を2層積層させることに成功した。Ge/BCB界面は強固な接合を持ち、多層積層時でもELO中のプロセスで剥離や破壊されることがないことから、コテクティビティプロセスにも適用性が高いと期待される。
(3) 高品質MOS界面形成技術・・・SiGe/Ge MOS界面形成に関しては、Y2O3ゲート絶縁膜等を用いた適切な界面層の実現により、低界面欠陥密度を実現する目途を立てることができた。

Strategy for Future Research Activity

(1) layer transferによるチャネル形成技術・・・smart cut 法を用いた薄膜チャネルのMOSFETにおいては、素子特性向上に向けて、特に貼り合わせ界面特性の改善が重要と考えられるので、チャネル形成プロセスの改良により界面特性の向上を進める。一方、ELO法では、Geは過酸化水素水系の溶液に高速でエッチングできるのに対して、SiGeSn混晶は高いエッチング耐性を示すことが分かったので、Ge層を犠牲層に、SiGeSn層を障壁層にしたELO法技術を確立する。また、障壁層とGe層をlayer transferする方法も開発する。InAsのlayer transferでは、GaSb上のAlSbの犠牲層の有効性は確かめられたが、犠牲層の膜厚と転写するInAs層の結晶性や平坦性に課題があるため、ドナー基板の臨界膜厚の考慮もしくは緻密な格子整合系結晶成長により、これら課題を解決する予定である。
(2) 低温SD形成と3次元CMOSコテクティビティ技術・・・350℃までの耐熱性と接合強度を有するBCBにて、Ge ELOの多段化が実証されてことで、上下チャネルでのコネクティビティの準備が整った。BCBとGeを貫通したビア形成を開発し、上下半導体の電気接続を実現することを目指す。一方、350℃以上の温度工程が必要な場合に備えた3次元集積技術の可能性も検討していく。
(3) 高品質MOS界面形成技術・・・InAs-OI nMOSFETの性能向上のためには、更なる界面特性の向上が必要であり、今後、面方位・絶縁膜形成前処理・異なるhigh-kゲート絶縁膜などを用いることによる界面欠陥の低減を進めていく。また、薄膜チャネルの電気特性に大きな影響を及ぼすGOI/III-V-OIの裏面界面の向上技術も検討する。

Assessment Rating

Result (Rating)

A+: Progress in the research exceeds the initial goal. More than expected research results are expected.

Research Products

• [Journal Article] SWIR Detection of Front Side Illumination InGaAs PhotoFETs on Si Substrate through Layer Transfer Technology (2021)
  • Author(s): OISHI Kazuaki、ISHII Hiroyuki、CHANG Wen-Hsin、SHIMIZU Tetsuji、ISHII Hiroto、FUJISHIRO Hiroki、ENDOH Akira、MAEDA Tatsuro
  • Journal Title: Vac. Surf. Sci. Volume: 64 Issue: 2 Pages: 74-79
  • DOI: 10.1380/vss.64.74
  • NAID: 130007985482
  • ISSN: 2433-5835, 2433-5843
  • Peer Reviewed
• [Journal Article] Accurate evaluation of specific contact resistivity between InAs/Ni?InAs alloy using a multi-sidewall transmission line method (2020)
  • Author(s): Sumita Kei、Kato Kimihiko、Takeyasu Jun、Toprasertpong Kasidit、Takenaka Mitsuru、Takagi Shinichi
  • Journal Title: Jpn. J. Appl. Phys. Volume: 59
  • DOI: 10.35848/1347-4065/ab6cb3
  • Peer Reviewed
• [Journal Article] Metal?oxide?semiconductor interface properties of TiN/Y2O3/Si0.62Ge0.38 gate stacks with high temperature post-metallization annealing (2020)
  • Author(s): Lee Tsung-En、Ke Mengnan、Kato Kimihiko、Takenaka Mitsuru、Takagi Shinichi
  • Journal Title: J. Appl. Phys. Volume: 127 Pages: 185705-185705
  • DOI: 10.1063/1.5144198
  • Peer Reviewed
• [Journal Article] Evaluation of polarization characteristics in metal/ferroelectric/semiconductor capacitors and ferroelectric field-effect transistors (2020)
  • Author(s): K. Toprasertpong, K. Tahara, M. Takenaka, and S. Takagi
  • Journal Title: Applied Physics Letters Volume: 116 Pages: 242903-242903
  • DOI: 10.1063/5.0008060
  • Peer Reviewed
• [Journal Article] Operation of (111) Ge-on-Insulator n-Channel MOSFET Fabricated by Smart-Cut Technology (2020)
  • Author(s): Lim Cheol-Min、Zhao Ziqiang、Sumita Kei、Toprasertpong Kasidit、Takenaka Mitsuru、Takagi Shinichi
  • Journal Title: IEEE Electron Device Lett. Volume: 41 Pages: 985-988
  • DOI: 10.1109/led.2020.2999777
  • Peer Reviewed
• [Journal Article] Influence of layer transfer and thermal annealing on the properties of InAs-On-Insulator films (2020)
  • Author(s): Sumita K.、Takeyasu J.、Toprasertpong K.、Takenaka M.、Takagi S.
  • Journal Title: J. Appl. Phys. Volume: 128 Pages: 015705-015705
  • DOI: 10.1063/5.0007978
  • Peer Reviewed
• [Journal Article] Reduction of MOS Interface Defects in TiN/Y?O?/Si?.??Ge?.?? Structures by Trimethylaluminum Treatment (2020)
  • Author(s): Lee Tsung-En、Ke Mengnan、Toprasertpong Kasidit、Takenaka Mitsuru、Takagi Shinichi
  • Journal Title: IEEE Trans. Electron Devices Volume: 67 Pages: 4067-4072
  • DOI: 10.1109/ted.2020.3014563
  • Peer Reviewed
• [Journal Article] Improved Ferroelectric/Semiconductor Interface Properties in Hf0.5Zr0.5O2 Ferroelectric FETs by Low-Temperature Annealing (2020)
  • Author(s): K. Toprasertpong, K. Tahara, T. Fukui, Z. Lin, K. Watanabe, M. Takenaka and S. Takagi
  • Journal Title: IEEE Electron Device Letters Volume: 41 Pages: 1588-1591
  • DOI: 10.1109/led.2020.3019265
  • Peer Reviewed
• [Journal Article] InGaAs photo field-effect-transistors (PhotoFETs) on half-inch Si wafer using layer transfer technology (2020)
  • Author(s): Maeda Tatsuro、Ishii Hiroyuki、Chang Wen Hsin、Shimizu Tetsuji、Ishii Hiroto、Ohishi Kazuaki、Endoh Akira、Fujishiro Hiroki
  • Journal Title: Japanese Journal of Applied Physics Volume: 59 Issue: SG Pages: SGGE03-SGGE03
  • DOI: 10.7567/1347-4065/ab5b44
  • NAID: 210000157638
  • ISSN: 0021-4922, 1347-4065
  • Peer Reviewed
• [Journal Article] Performance and reliability improvement in Ge(100) nMOSFETs through channel flattening process (2020)
  • Author(s): W. H. Chang, T. Irisawa, W. Mizubayashi, H. Ishii, and T. Maeda
  • Journal Title: Solid-State Electronics Volume: 169 Pages: 107816-107816
  • DOI: 10.1016/j.sse.2020.107816
  • Peer Reviewed
• [Journal Article] Epitaxial Growth of Ge/III-V Films and Hetero-Layer Lift-Off for Ultra-Thin GeOI Fabrication (2020)
  • Author(s): T. Maeda, T. Irisawa, H. Ishii, and W. H. Chang
  • Journal Title: ECS Transactions Volume: 98(5) Pages: 157-167
  • DOI: 10.1149/09805.0157ecst
  • Peer Reviewed
• [Journal Article] Spectral Responsivity Characteristics of Front‐Side Illumination InGaAs PhotoFETs on Si (2020)
  • Author(s): O. Ohishi, H. Ishii, W. H. Chang, H. Ishii, A. Endo, H. Fujisiro and T. Maeda
  • Journal Title: Phys. Status Solidi A Volume: 218(3)
  • DOI: 10.1002/pssa.202000439
  • Peer Reviewed
• [Journal Article] Effects of hydrogen ion implantation dose on physical and electrical properties of Ge-on-insulator layers fabricated by the smart-cut process (2020)
  • Author(s): Lim C.-M.、Zhao Z.、Sumita K.、Toprasertpong K.、Takenaka M.、Takagi S.
  • Journal Title: AIP Advances Volume: 10 Pages: 015045-015045
  • DOI: 10.1063/1.5132881
  • Peer Reviewed
• [Journal Article] Fabrication of thin body InAs-on-insulator structures by Smart Cut method with H+ implantation at room temperature (2019)
  • Author(s): Sumita Kei、Kato Kimihiko、Takenaka Mitsuru、Takagi Shinichi
  • Journal Title: Japanese Journal of Applied Physics Volume: 58 Issue: SB Pages: SBBA03-SBBA03
  • DOI: 10.7567/1347-4065/aafa68
  • NAID: 210000135316
  • ISSN: 0021-4922, 1347-4065
  • Peer Reviewed
• [Journal Article] Electrical characteristic of atomic layer deposition La2O3/Si MOSFETs with ferroelectric-type hysteresis (2019)
  • Author(s): Endo Kiyoshi、Kato Kimihiko、Takenaka Mitsuru、Takagi Shinichi
  • Journal Title: Japanese Journal of Applied Physics Volume: 58 Issue: SB Pages: SBBA05-SBBA05
  • DOI: 10.7567/1347-4065/aafecf
  • NAID: 210000135409
  • ISSN: 0021-4922, 1347-4065
  • Peer Reviewed
• [Journal Article] Slow Trap Properties and Generation in Al2O3/GeOx/Ge MOS Interfaces Formed by Plasma Oxidation Process (2019)
  • Author(s): Ke Mengnan、Takenaka Mitsuru、Takagi Shinichi
  • Journal Title: ACS Applied Electronic Materials Volume: 1 Pages: 311-317
  • DOI: 10.1021/acsaelm.8b00071
  • Peer Reviewed
• [Journal Article] Impact of metal gate electrodes on electrical properties of Y2O3/Si0.78Ge0.22 gate stacks (2019)
  • Author(s): Lee T.-E.、Kato K.、Ke M.、Toprasertpong K.、Takenaka M.、Takagi S.
  • Journal Title: Microelectronic Engineering Volume: 214 Pages: 87-92
  • DOI: 10.1016/j.mee.2019.05.005
  • Peer Reviewed
• [Journal Article] Re-examination of effects of sulfur treatment on Al2O3/InGaAs metal-oxide-semiconductor interface properties (2019)
  • Author(s): Yoon S.-H.、Kato K.、Yokoyama C.、Ahn D.-H.、Takenaka M.、Takagi S.
  • Journal Title: Journal of Applied Physics Volume: 126 Pages: 184501-184501
  • DOI: 10.1063/1.5111630
  • Peer Reviewed
• [Journal Article] Reduction of Slow Trap Density in Al2O3/GeO x N y /n-Ge MOS Interfaces by PPN-PPO Process (2019)
  • Author(s): Ke Mengnan、Takenaka Mitsuru、Takagi Shinichi
  • Journal Title: IEEE Transactions on Electron Devices Volume: 66 Pages: 5060-5064
  • DOI: 10.1109/ted.2019.2948074
  • Peer Reviewed
• [Journal Article] Impact of SiGe Layer Thickness in Starting Substrates on Strained Ge-on-Insulator pMOSFETs Fabricated by Ge Condensation Method (2019)
  • Author(s): K.-W. Jo, W.-K. Kim, M. Takenaka and S. Takagi
  • Journal Title: Applied Physics Letters Volume: 114 Pages: 062101-062101
  • DOI: 10.1063/1.5068713
  • Peer Reviewed / Int'l Joint Research
• [Journal Article] InGaSb-on-insulator p-channel metal-oxide-semiconductor field-effect transistors on Si fabricated by direct wafer bonding (2019)
  • Author(s): M. Yokoyama, H. Yokoyama, M. Takenaka and S. Takagi
  • Journal Title: J. Appl. Phys. Volume: 125 Pages: 114501-114501
  • DOI: 10.1063/1.5049518
  • Peer Reviewed
• [Journal Article] Ultra-Low Power III-V-Based Mosfets and Tunneling FETs (2018)
  • Author(s): S. Takagi, D.-h. Ahn, T. Gotow, C. Yokoyama, C.-Y. Chang, K. Endo, K. Katoh and M. Takenaka
  • Journal Title: ECS Transactions Volume: 85 Pages: 27-37
  • DOI: 10.1149/08508.0027ecst
  • Peer Reviewed
• [Journal Article] Pre-treatment Effects on high-k/InxGa1-xAs MOS Interface Properties and their Physical Model (2018)
  • Author(s): C. Yokoyama, C.-Y. Change, M. Takenaka, and S. Takagi
  • Journal Title: IEEE Journal of the Electron Devices Society Volume: 6 Pages: 487-493
  • DOI: 10.1109/jeds.2017.2760344
  • Peer Reviewed
• [Journal Article] Impact of atomic layer deposition high k films on slow trap density in Ge MOS interfaces with GeOx interfacial layers formed by plasma pre-oxidation (2018)
  • Author(s): M. Ke, M. Takenaka, and S. Takagi
  • Journal Title: IEEE Journal of the Electron Devices Society Volume: 6 Pages: 950-955
  • DOI: 10.1109/jeds.2018.2822758
  • Peer Reviewed
• [Journal Article] Relationship between interface state generation and substrate hole current in InGaAs metal-oxide-semiconductor (MOS) interfaces (2018)
  • Author(s): S.-H. Yoon, D.-H. Ahn, M. Takenaka and S. Takagi
  • Journal Title: J. Appl. Phys. Volume: 123 Pages: 234502-234502
  • DOI: 10.1063/1.5031052
  • Peer Reviewed
• [Journal Article] Ultrathin-body Ge-On-Insulator MOSFET and TFET technologies (2018)
  • Author(s): S. Takagi, W.-K. Kim, K.-W. Jo, R. Matsumura, R. Takaguchi, T. Katoh, T.-E. Bae, K. Kato and M. Takenaka
  • Journal Title: ECS Transactions Volume: 86 Pages: 75-86
  • DOI: 10.1149/08607.0075ecst
  • Peer Reviewed
• [Journal Article] Physical Mechanisms of Mobility Enhancement in Ultrathin Body GeOI pMOSFETs Fabricated by HEtero-Layer-Lift-Off Technology (2018)
  • Author(s): W. H. Chang, T. Irisawa, H. Ishii, N. Uchida and T. Maeda
  • Journal Title: IEEE Transactions on Electron Devices Volume: 66 Pages: 1182-1188
  • DOI: 10.1109/ted.2019.2895349
  • Peer Reviewed
• [Journal Article] High performance UTB GeOI n and pMOSFETs featuring HEtero-Layer-Lift-Off (HELLO) technology (2018)
  • Author(s): W. H. Chang, T. Irisawa, H. Ishii, H. Hattori, H. Ota, H. Takagi, Y. Kurashima, N. Uchida, and T. Maeda
  • Journal Title: ECS Transactions Volume: 86 Pages: 25-34
  • DOI: 10.1149/08610.0025ecst
  • Peer Reviewed
• [Journal Article] Ultra-thin germanium-tin on insulator structure through direct bonding technique (2018)
  • Author(s): T. Maeda, W. H. Chang, T. Irisawa, H. Ishii, H. Oka, M. Kurosawa, Y. Imai, O. Nakatsuka and N. Uchida
  • Journal Title: Semiconductor Science and Technology Volume: 33
  • DOI: 10.1088/1361-6641/aae620
  • Peer Reviewed
• [Journal Article] MOS Interface Defect Control in Ge/IIIV Gate Stacks (2018)
  • Author(s): S. Takagi, M. Ke, C. Y. Chang, C. Yokoyama, M. Yokoyama, T. Gotow, K. Nishi, and M. Takenaka
  • Journal Title: ECS Transactions Volume: 80 (1) Pages: 109-118
  • DOI: 10.1149/08001.0109ecst
  • Peer Reviewed
• [Journal Article] Impact of La2O3/InGaAs MOS Interfaces on the Performance of InGaAs MOSFETs (2017)
  • Author(s): C.-Y. Chang, C. Yokoyama, M. Takenaka, Member and S. Takagi
  • Journal Title: IEEE Trans. Electron Devices Volume: 64 Pages: 2519-2525
  • DOI: 10.1109/ted.2017.2696741
  • Peer Reviewed
• [Journal Article] Reduction of slow trap density of Al2O3/GeOx/n-Ge MOS interfaces by inserting ultrathin Y2O3 interfacial layers (2017)
  • Author(s): M. Ke, M. Takenaka and S. Takagi
  • Journal Title: Microelectronic Eng. Volume: 178 Pages: 132-136
  • DOI: 10.1016/j.mee.2017.04.021
  • Peer Reviewed
• [Journal Article] Interface state generation of Al2O3/InGaAs MOS structures by electrical stress (2017)
  • Author(s): S. -H. Yoon, C.-Y. Chang, D. H. Ahn, M. Takenaka and S. Takagi
  • Journal Title: Microelectronic Eng. Volume: 178 Pages: 313-317
  • DOI: 10.1016/j.mee.2017.05.015
  • Peer Reviewed
• [Journal Article] Modulation of sub-threshold properties of InGaAs MOSFETs by La2O3 gate dielectrics (2017)
  • Author(s): C.-Y. Chang, K. Endo, K. Kato, M. Takenaka and S. Takagi
  • Journal Title: AIP Advances Volume: 7 Pages: 095215-095215
  • DOI: 10.1063/1.4999958
  • Peer Reviewed
• [Journal Article] First Experimental Observation of Channel Thickness Scaling Induced Electron Mobility Enhancement in UTB-GeOI nMOSFETs (2017)
  • Author(s): W.-H. Chang, T. Irisawa, H. Ishii, H. Hattori, H. Ota, H. Takagi, Y. Kurashima, N. Uchida, and T. Maeda
  • Journal Title: IEEE Trans. Electron Devices Volume: 64 Pages: 4615-4621
  • DOI: 10.1109/ted.2017.2756061
  • Peer Reviewed
• [Presentation] (111)面チャネルの薄膜化によるInAs-OI nMOSFETのサブバンド制御手法の提案と極薄膜(111) InAs-OI基板の実現 (2021)
  • Author(s): 隅田圭, 吉津遼平, トープラサートポン・カシディット, 竹中充, 高木信一
  • Organizer: 第68回応用物理学会春季学術講演会
• [Presentation] (111) InAs-OI nMOSFETのチャネル薄膜化による移動度向上の実現と伝導帯内の界面準位の実験的評価 (2021)
  • Author(s): 隅田圭, 吉津遼平, トープラサートポン・カシディット, 竹中充, 高木信一
  • Organizer: 第68回応用物理学会春季学術講演会
• [Presentation] HfO2系FeFETにおける結晶化アニール温度とSi界面特性のトレードオフ (2021)
  • Author(s): トープラサートポン・カシディット，田原建人，福井太一郎，林早ヨウ，渡辺耕坪，竹中充，高木信一
  • Organizer: 第68回応用物理学会春季学術講演会
• [Presentation] InAs/Ni-InAs間のコンタクト抵抗率とその評価法に関する実験的検討 (2021)
  • Author(s): 竹安淳, 隅田圭, トープラサートポン・カシディット, 竹中充, 高木信一
  • Organizer: 第68回応用物理学会春季学術講演会
• [Presentation] Defect control of Y2O3-based SiGe MOS interfaces properties (2021)
  • Author(s): T.-E. Lee, K. Toprasertpong, M. Takenaka and S. Takagi
  • Organizer: 第68回応用物理学会春季学術講演会
  • Invited
• [Presentation] Characterization of slow traps in MOS interfaces of TiN/Y2O3/SiGe gate stacks (2021)
  • Author(s): T.-E. Lee, K. Toprasertpong, M. Takenaka and S. Takagi
  • Organizer: 第68回応用物理学会春季学術講演会
• [Presentation] Characterization of slow traps in SiGe MOS interfaces by TiN/Y2O3 gate stacks (2021)
  • Author(s): T.-E. Lee, K. Toprasertpong, M. Takenaka and S. Takagi
  • Organizer: IEEE International Reliability Physics Symposium (IRPS)
  • Int'l Joint Research
• [Presentation] 異種半導体材料の積層化およびデバイス集積化技術 (2021)
  • Author(s): 前田辰郎
  • Organizer: 第5回3次元積層半導体量子イメージセンサ研究会
  • Int'l Joint Research
• [Presentation] UTB-GeOI の量子化準位の顕微フォトリフレクタンス測定 (2021)
  • Author(s): 公平拓見、安武裕輔、張文馨、入沢寿史、石井裕之、前田辰郎、深津晋
  • Organizer: 第68回応用物理学会春季学術講演会
• [Presentation] 寄生抵抗を考慮した近赤外InGaAs PhotoFETsの感度評価 (2021)
  • Author(s): 大石和明、石井寛仁、張文馨、石井裕之、遠藤聡、藤代博記、前田辰郎
  • Organizer: 第68回応用物理学会春季学術講演会
• [Presentation] [招待講演] チャネル薄膜化と(111)面方位の組み合わせによるInAs-On-Insulator nMOSFETのサブバンド制御 (2021)
  • Author(s): 隅田圭, トープラサートポン カシディット, 竹中充, 高木 信一
  • Organizer: 電子情報通信学会SDM研究会／応用物理学会シリコンテクノロジー分科会共催１月研究会（IEDM特集）
  • Invited
• [Presentation] InAs-On-Insulatorチャネルの極薄膜化と(111)面方位の組み合わせによるサブバンド制御を利用したnMOSFETの高性能化 (2021)
  • Author(s): 隅田圭, トープラサートポン カシディット, 竹中充, 高木信一
  • Organizer: 電気学会電子デバイス研究会, 「高機能化合物半導体エレクトロニクス技術と将来システムへの応用」
  • Invited
• [Presentation] Asymmetric Polarization Response of Electrons and Holes in Si FeFETs: Demonstration of Absolute Polarization Hysteresis Loop and Inversion Hole Density over 2×1013 cm-2 (2020)
  • Author(s): K. Toprasertpong, Z. -Y. Lin, T. -E. Lee, M. Takenaka, and S. Takagi
  • Organizer: Symposia on VLSI Technology
  • Int'l Joint Research
• [Presentation] 【招待講演】先端CMOSデバイスの研究動向 (2020)
  • Author(s): 高木信一
  • Organizer: 東レリサーチセンター半導体デバイス分析セミナー2020
  • Invited
• [Presentation] Prospects and challenges of advanced CMOS logic devices (2020)
  • Author(s): S. Takagi
  • Organizer: 7th International conference on “Microelectronics, Circuits and Systems” (Micro2020)
  • Int'l Joint Research / Invited
• [Presentation] ［招待講演］Si強誘電体FETにおける分極・電荷のカップリングとメモリ特性への影響 (2020)
  • Author(s): トープラサートポン・カシディット, 林早ヨウ, 李宗恩, 竹中充, 高木信一
  • Organizer: 電子情報通信学会ICD/SDM/ ITE-IST研究会
  • Invited
• [Presentation] Si強誘電体FETにおける強誘電分極に誘起される反転層電荷の振る舞い (2020)
  • Author(s): トープラサートポン・カシディット，林早ヨウ，李宗恩，竹中充，高木信一
  • Organizer: 第81回応用物理学会秋季学術講演会
• [Presentation] Impact of ALD high-k materials on SiGe MOS interface properties with TiN gate (2020)
  • Author(s): T.-E. Lee, K. Toprasertpong, M. Takenaka and S. Takagi
  • Organizer: 第81回応用物理学会秋季学術講演会
• [Presentation] Thickness dependence of antiferroelectricity in ALD ultrathin ZrO2 films (2020)
  • Author(s): Xuan Luo, Kasidit Toprasertpong, Mitsuru Takenaka, Shinichi Takagi
  • Organizer: 第81回応用物理学会秋季学術講演会
• [Presentation] Critical Impact of Ferroelectric-Phase Formation Annealing on MFIS Interface of HfO2-Based Si FeFETs (2020)
  • Author(s): K. Toprasertpong, K. Tahara, T. Fukui, Z. Lin, K. Watanabe, M. Takenaka and S. Takagi
  • Organizer: 52nd International Conference on Solid State Devices and Materials (SSDM)
  • Int'l Joint Research
• [Presentation] Antiferroelectricity and cycling behavior of ALD ZrO2 ultra-thin films (2020)
  • Author(s): X. Luo, K. Toprasertpong, M. Takenaka and S. Takagi
  • Organizer: 52nd International Conference on Solid State Devices and Materials (SSDM)
  • Int'l Joint Research
• [Presentation] Subband Engineering by Combination of Channel Tchikness Scaling and (111) Surface Orientation in InAs-On-Insulator nMOSFETs (2020)
  • Author(s): K. Sumita, K. Toprasertpong, M. Takenaka, and S. Takagi
  • Organizer: IEEE International Electron Devices Meeting (IEDM 2020)
  • Int'l Joint Research
• [Presentation] Revision of conductance method for evaluating interface state density at MFIS interfaces (2020)
  • Author(s): T.-E. Lee, Z. Lin, K. Toprasertpong, M. Takenaka and S. Takagi
  • Organizer: 51th IEEE Semiconductor Interface Specialists Conference (SISC)
  • Int'l Joint Research
• [Presentation] [招待講演] チャネル薄膜化と(111)面方位の組み合わせによるInAs-On-Insulator nMOSFETのサブバンド制御 (2020)
  • Author(s): 隅田圭, トープラサートポン・カシディット, 竹中充, 高木 信一
  • Organizer: 電子情報通信学会SDM研究会／応用物理学会シリコンテクノロジー分科会共催１月研究会（IEDM特集）
• [Presentation] InAs-On-Insulatorチャネルの極薄膜化と(111)面方位の組み合わせによるサブバンド制御を利用したnMOSFETの高性能化 (2020)
  • Author(s): 隅田圭, トープラサートポン・カシディット, 竹中充, 高木信一
  • Organizer: 電気学会電子デバイス研究会「高機能化合物半導体エレクトロニクス技術と将来システムへの応用」
  • Invited
• [Presentation] Advanced Layer Transfer Technology of post-Si Materials for Heterogeneous Integration (2020)
  • Author(s): T. Maeda, T. Irisawa, H. Ishii, and W. H. Chang
  • Organizer: 4th IEEE Electron Device Technology and Manufacturing (EDTM) Conference 2020
  • Int'l Joint Research / Invited
• [Presentation] Performance and Reliability Improvement in Ge nMOSFETs with Different Surface Orientation through Channel Flattening Process (2020)
  • Author(s): W. H. Chang, T. Irisawa, W. Mizubayashi, H. Ishii, and T. Maeda
  • Organizer: 4th IEEE Electron Device Technology and Manufacturing (EDTM) Conference 2020
  • Int'l Joint Research
• [Presentation] Layer transfer technology for heterogeneous material integration (2020)
  • Author(s): T. Maeda
  • Organizer: Symposia on VLSI Technology and Circuits, Short Course
  • Int'l Joint Research / Invited
• [Presentation] Si 基板上表面照射型 InGaAs PhotoFET の近赤外域分光感度特性 (2020)
  • Author(s): 大石和明、石井寛仁、張文馨、石井裕之、遠藤聡、藤代博記、前田辰郎
  • Organizer: 第81回応用物理学会秋季学術講演会
• [Presentation] Ultrathin-body GeOI における量子閉じ込め電子ラマン散乱 (2020)
  • Author(s): 公平拓見、安武裕輔、張文馨、入沢寿史、石井裕之、内田紀行、前田辰郎、深津晋
  • Organizer: 第81回応用物理学会秋季学術講演会
• [Presentation] Epitaxial Growth of Ge/III-V Films and Hetero-Layer Lift-Off for Ultra-Thin GeOI Fabrication (2020)
  • Author(s): T. Maeda, T. Irisawa, H. Ishii, and W. H. Chang
  • Organizer: PRiME 2020 G03: SiGe, Ge, and Related Materials: Materials, Processing, and Devices 9
  • Int'l Joint Research / Invited
• [Presentation] 異種半導体転写によるヘテロジーニアスインテグレーション (2020)
  • Author(s): 前田辰郎
  • Organizer: SSISフォーラム(一般社団法人半導体産業人協会)
  • Int'l Joint Research
• [Presentation] First demonstration of (111) Ge-on-insulator n-channel MOSFET fabricated by smart-cut technology (2020)
  • Author(s): C.-M. Lim, Z. Zhao, K. Sumita, K. Toprasertpong, M. Takenaka and S. Takagi
  • Organizer: 第67回応用物理学会春季学術講演会
• [Presentation] 強誘電体FETのMOS界面における電荷分布の評価とデバイス動作の理解 (2020)
  • Author(s): トープラサートポン・カシディット，竹中充，高木信一
  • Organizer: 第67回応用物理学会春季学術講演会
• [Presentation] InAs-On-Insulator基板の高品質化と貼り合わせ界面特性の評価 (2020)
  • Author(s): 隅田圭, 加藤公彦, 竹安淳, トープラサートポン・カシディット, 竹中充, 高木信一
  • Organizer: 第67回応用物理学会春季学術講演会
  • Invited
• [Presentation] Multi-Sidewall TLMを用いた精密なInAs/Ni-InAs間の接触抵抗率測定 (2020)
  • Author(s): 隅田圭, 竹安淳, 加藤公彦, トープラサートポン・カシディット, 竹中充, 高木信一
  • Organizer: 第67回応用物理学会春季学術講演会
• [Presentation] プラズマ酸化により作製したAl2O3/GeOx/n-Ge MOS界面における遅い準位の特性 (2020)
  • Author(s): 柯夢南, 竹中充, 高木信一
  • Organizer: 第67回応用物理学会春季学術講演会
• [Presentation] n-Ge MOS絶縁膜中の異なるキャリア捕獲トラップの峻別手法の提案 (2020)
  • Author(s): 柯夢南, 竹中充, 高木信一
  • Organizer: 第67回応用物理学会春季学術講演会
• [Presentation] n-Ge MOS構造における異なる界面層へのキャリアトラップ特性の比較 (2020)
  • Author(s): 柯夢南, 竹中充, 高木信一
  • Organizer: 第67回応用物理学会春季学術講演会
• [Presentation] 酸化濃縮法により作製した圧縮ひずみ(110)面SiGe-OI pMOSFET (2020)
  • Author(s): 曺光元、トープラサートポン・カシディット、竹中充、高木 信一
  • Organizer: 第67回応用物理学会春季学術講演会
• [Presentation] 酸化濃縮法により作製したGOIを用いた引張りひずみGOI nMOSFET (2020)
  • Author(s): 曺光元, 林澈敏, トープラサートポン・カシディット, 竹中充, 高木信一
  • Organizer: 第67回応用物理学会春季学術講演会
• [Presentation] (001)GOI薄膜化によるnMOSFETの電子移動度向上機構に関する考察 (2020)
  • Author(s): 高木信一, 曺光元, 林澈敏, トープラサートポン・カシディット, 竹中充
  • Organizer: 第67回応用物理学会春季学術講演会
• [Presentation] Improvement of ferroelectric properties of TiN/Hf0.5Zr0.5O2/Si gate stacks by the insertion of Al2O3 interfacial layers (2020)
  • Author(s): Z.-Y. Lin, T.-E. Lee, H.-Z. Tang, K. Toprasertpong, M. Takenaka and S. Takagi
  • Organizer: 第67回応用物理学会春季学術講演会
• [Presentation] 転写技術を用いたSi基板上の表面照射型InGaAs PhotoFETの実証 (2020)
  • Author(s): 大石和明，石井寛仁，張文馨, 石井裕之, 清水鉄司，遠藤聡, 藤代博記，前田辰郎
  • Organizer: 「電子デバイス界面テクノロジー研究会 ―材料・プロセス・デバイス特性の物理―」 (第25回研究会)
• [Presentation] Ge表面清浄プロセスを用いたY2O3/Ge pMOSFETsの作製と評価 (2020)
  • Author(s): 石井寛仁，張文馨, 石井裕之, 森田行則，遠藤聡, 藤代博記，前田辰郎
  • Organizer: 「電子デバイス界面テクノロジー研究会 ―材料・プロセス・デバイス特性の物理―」 (第25回研究会)
• [Presentation] Y2O3/Ge pMOSFETsにおけるGe表面清浄化プロセスの検討 (2020)
  • Author(s): 石井寛仁，張文馨, 石井裕之, 森田行則，遠藤聡, 藤代博記，前田辰郎
  • Organizer: SATテクノロジー・ショーケース2020
• [Presentation] Ultrathin-body GeOI の円偏光フォトルミネッセンス (2020)
  • Author(s): 公平拓見、安武裕輔、張文馨、入沢寿史、石井裕之、内田紀行、前田辰郎、深津晋
  • Organizer: 第67回応用物理学会春季学術講演会
• [Presentation] Geチャネル平坦化プロセスにおけるGe nMOSFETsの面方位依存性 (2020)
  • Author(s): 石井寛仁，張文馨, 入沢寿史, 石井裕之, 水林亘，前田辰郎
  • Organizer: 第67回応用物理学会春季学術講演会
• [Presentation] Advanced Layer Transfer Technology of post-Si Materials for Heterogeneous Integration (2020)
  • Author(s): T. Maeda, T. Irisawa, H. Ishii, and W. H. Chang
  • Organizer: 4th IEEE Electron Device Technology and Manufacturing (EDTM) Conference
  • Int'l Joint Research / Invited
• [Presentation] Performance and Reliability Improvement in Ge nMOSFETs with Different Surface Orientation through Channel Flattening Process (2020)
  • Author(s): W. H. Chang, T. Irisawa, W. Mizubayashi, H. Ishii, and T. Maeda
  • Organizer: 4th IEEE Electron Device Technology and Manufacturing (EDTM) Conference
  • Int'l Joint Research
• [Presentation] Advanced MOSFETs and TFETs using Alternative Semiconductors for Ultralow Power Logic Applications (2019)
  • Author(s): S. Takagi, K. Kato, K. Sumita, K.-W. Jo, R. Takaguchi, D.-H. Ahn, K. Toprasertpong, M. Takenaka
  • Organizer: MRS spring meeting, Symposium: EP09: Devices and Materials to Extend the CMOS Roadmap for Logic and Memory Applications
  • Int'l Joint Research / Invited
• [Presentation] Effects of thermal annealing on film quality of InAs-On-Insulator structures fabricated by Smart Cut method (2019)
  • Author(s): K. Sumita, J. Takeyasu, K. Kato, M. Takenaka, and S. Takagi
  • Organizer: 2019 Compound Semiconductor Week (CSW2019)
  • Int'l Joint Research
• [Presentation] Improvement of SiGe MOS interface properties with a wide range of Ge contents by using TiN/Y2O3 gate stacks with TMA passivation (2019)
  • Author(s): T.-E. Lee, K. Kato, M. Ke, M. Takenaka, and S. Takagi,
  • Organizer: Symposia on VLSI Technology
  • Int'l Joint Research
• [Presentation] Advanced MOS Device Technology for Low Power Logic LSI (2019)
  • Author(s): S. Takagi, K. Kato, K. Sumita, K.-w. Jo, C.-M. Lim, R. Takaguchi, D.-H. Ahn, J. Takeyasu, K. Toprasertpong and M. Takenaka
  • Organizer: 26th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES)
  • Int'l Joint Research / Invited
• [Presentation] MOS interface defect control in alternative channel materials (2019)
  • Author(s): S. Takagi, M. Ke, D.-H Ahn, T.-E. Lee, S.-H. Yoon, K. Kato, K. Toprasertpong and M. Takenaka
  • Organizer: 21st Conference on Insulating Films on Semiconductors (INFOS 2019)
  • Int'l Joint Research / Invited
• [Presentation] Impact of metal gate electrodes on electrical properties of Y2O3/Si0.78Ge0.22 gate stacks (2019)
  • Author(s): T.-E. Lee, K. Kato, M. Takenaka and S. Takagi
  • Organizer: 21st Conference on Insulating Films on Semiconductors (INFOS 2019)
  • Int'l Joint Research
• [Presentation] Re-examination of Sulfur treatment effects on Al2O3/InGaAs MOS interface properties (2019)
  • Author(s): S.-H. Yoon, K. Kato, C. Yokoyama, M. Takenaka and S. Takagi
  • Organizer: 21st Conference on Insulating Films on Semiconductors (INFOS 2019)
  • Int'l Joint Research
• [Presentation] Effects of Hydrogen ion implantation dose on electrical and physical properties of (100) and (111) Ge-on-insulator substrates fabricated by Smart-cut process (2019)
  • Author(s): C.-M. Lim, Z. Zhao, K. Sumita, K. Toprasertpong, M. Takenaka and S. Takagi
  • Organizer: 51th International Conference on Solid State Devices and Materials (SSDM)
  • Int'l Joint Research
• [Presentation] Accurate evaluation of contact resistivity between InAs/Ni-InAs alloy (2019)
  • Author(s): K. Sumita, J. Takeyasu, K. Kato, K. Toprasertpong, M. Takenaka and S. Takagi
  • Organizer: 51th International Conference on Solid State Devices and Materials (SSDM)
  • Int'l Joint Research
• [Presentation] (NH4)2S処理理前の前処理がAl2O3/InGaAs MOS界面に与える影響 (2019)
  • Author(s): 尹尚希, 加藤公彦, 横山千晶, 安大煥, 竹中充, 高木信一
  • Organizer: 第80回応用物理学会秋季学術講演会
• [Presentation] Improvement of Si0.78Ge0.22 MOS interface properties by using TiN/Y2O3 gate stacks with TMA passivation (2019)
  • Author(s): T. Lee, M. Takenaka, and S. Takagi
  • Organizer: 第80回応用物理学会秋季学術講演会
• [Presentation] Influence of hydrogen ion implantation dose on characteristics of Ge-on-insulator substrates fabricated by smart-cut technology (2019)
  • Author(s): C.-M. Lim, Z. Zhao, K. Sumita, K. Toprasertpong, M. Takenaka and S. Takagi
  • Organizer: 第80回応用物理学会秋季学術講演会
• [Presentation] Smart Cut法により作製したInAs-On-Insulator基板への熱処理の影響 (2019)
  • Author(s): 隅田圭, 竹安淳, 加藤公彦, トープラサートポン・カシディット, 竹中充, 高木信一
  • Organizer: 第80回応用物理学会秋季学術講演会
• [Presentation] Performance enhancement of extremely-thin-body SiGe- or Ge-on-insulator pMOSFETs fabricated by Ge condensation (2019)
  • Author(s): K.-W. Jo, W.-K. Kim, M. Takenaka and S. Takagi
  • Organizer: 第80回応用物理学会秋季学術講演会
• [Presentation] TiN/Hf0.5Zr0.5O2/Si MFSキャパシタの電気特性に与える基板タイプの影響 (2019)
  • Author(s): トープラサートポン・カシディット，田原建人，福井太一郎，竹中充，高木信一
  • Organizer: 第80回応用物理学会秋季学術講演会
• [Presentation] Fabrication of high quality InAs-on-Insulator structures by Smart Cut process with reuse of InAs wafers (2019)
  • Author(s): K. Sumita, J. Takeyasu, K. Kato, K. Toprasertpong, M. Takenaka and S. Takagi
  • Organizer: IEEE International 3D Systems Integration Conference (3DIC)
  • Int'l Joint Research
• [Presentation] Importance of semiconductor MOS interface control on advanced electron devices (2019)
  • Author(s): S. Takagi, T.-E. Lee, M. Ke, S.-H. Yoon, D.-H Ahn, K. Kato, K. Toprasertpong and M. Takenaka
  • Organizer: International Workshop on Dielectric Thin Films for Future ULSI Devices: Science and Technology (IWDTF)
  • Int'l Joint Research / Invited
• [Presentation] Direct Observation of Interface Charge Behaviors in FeFET by Quasi-Static Split C-V and Hall Techniques: Revealing FeFET Operation (2019)
  • Author(s): K. Toprasertpong, M. Takenaka, and S. Takagi
  • Organizer: IEEE International Electron Devices Meeting (IEDM 2019)
  • Int'l Joint Research
• [Presentation] Strain and surface orientation engineering in extremely-thin body Ge and SiGe-on-insulator MOSFETs fabricated by Ge condensation (2019)
  • Author(s): K.-W. Jo, C.-M. Lim, W.-K. Kim, K. Toprasertpong, M. Takenaka and S. Takagi
  • Organizer: IEEE International Electron Devices Meeting (IEDM 2019)
  • Int'l Joint Research
• [Presentation] Impact of atomic layer deposition high-k materials on Si0.78Ge0.22 MOS interface properties with TiN gate (2019)
  • Author(s): T.-E. Lee, K. Toprasertpong, M. Takenaka and S. Takagi
  • Organizer: 50th IEEE Semiconductor Interface Specialists Conference (SISC)
  • Int'l Joint Research
• [Presentation] Contributions of electron and hole slow traps to hysteresis in C-V characteristics of Al2O3/GeOx/p-Ge MOS capacitors (2019)
  • Author(s): M. Ke, M. Takenaka and S. Takagi
  • Organizer: 50th IEEE Semiconductor Interface Specialists Conference (SISC)
  • Int'l Joint Research
• [Presentation] Germanium Layer Transfer with Low Temperature Direct Bonding and Epitaxial Lift-off Technique for Ge-based monolithic 3D integration (2019)
  • Author(s): T. Maeda, W. H. Chang, T. Irisawa, H. Ishii, Y. Kurashima, H. Takagi and N. Uchida
  • Organizer: Silicon Nanoelectronics Workshop (SNW)
  • Int'l Joint Research
• [Presentation] Impact of Channel Flattening Process on Device Performance of Ge nMOSFETs with Different Surface Orientations (2019)
  • Author(s): W. H. Chang, T. Irisawa, H. Ishii, N. Uchida and T. Maeda
  • Organizer: International Conference on Solid State Devices and Materials (SSDM)
  • Int'l Joint Research
• [Presentation] InGaAs photo field-effect-transistors (PhotoFETs) on Half-inch Si Wafer Using Layer Transfer Technology (2019)
  • Author(s): T. Maeda, H. Ishii, W. H. Chang, T. Shimizu, H. Ishii, O. Ohishi, A. Endo and H. Fujisiro
  • Organizer: International Conference on Solid State Devices and Materials (SSDM)
  • Int'l Joint Research
• [Presentation] モノリシック3次元CMOS集積に向けたGe-On-Insulator技術 (2019)
  • Author(s): 前田 辰郎, 張 文馨, 入沢 寿史, 石井 裕之, 倉島優一、髙木秀樹、内田 紀行
  • Organizer: 第80回応用物理学会秋季学術講演会
• [Presentation] 転写技術による表面照射型近赤外InGaAs PhotoFET の開発 (2019)
  • Author(s): 大石和明，石井寛仁，張文馨, 石井裕之, 清水鉄司，遠藤聡, 藤代博記，前田辰郎
  • Organizer: 第80回応用物理学会秋季学術講演会
• [Presentation] Ge清浄表面からのY2O3/Ge pMOSFETsの作製 (2019)
  • Author(s): 石井寛仁，張文馨, 石井裕之, 森田行則，遠藤聡, 藤代博記，前田辰郎
  • Organizer: 第80回応用物理学会秋季学術講演会
• [Presentation] 高移動度半導体薄膜接合転写とデバイス応用 (2019)
  • Author(s): 前田辰郎
  • Organizer: 日本学術振興会 接合界面創成技術第191委員会第23回講演会
  • Invited
• [Presentation] デバイスの三次元化とその課題 (2019)
  • Author(s): 前田辰郎
  • Organizer: 日本学術振興会先端ナノデバイス・材料テクノロジー第151委員会第4回研究会
  • Invited
• [Presentation] 新しいⅣ族半導体のトランスファー&ビルトによる新機能集積技術 (2019)
  • Author(s): 前田辰郎
  • Organizer: 科学技術振興機構新技術説明会
• [Presentation] Spin on Glassからの固相拡散によるGe中のn型不純物拡散挙動 (2019)
  • Author(s): 高口遼太郎，竹中充, 高木信一
  • Organizer: 第66回応用物理学会春季学術講演会
• [Presentation] Impact of metal gate electrodes on electrical properties of Y2O3/Si0.78Ge0.22 gate stacks (2019)
  • Author(s): T. Lee, M. Takenaka, and S. Takagi
  • Organizer: 第66回応用物理学会春季学術講演会
• [Presentation] Improvement of material quality of (100) and (111) Ge-on-insulator substrates fabricated by smart-cut technology (2019)
  • Author(s): C.-M. Lim, M. Takenaka and S. Takagi
  • Organizer: 3rd Electron Devices Technology and Manufacturing (EDTM) Conference
  • Int'l Joint Research
• [Presentation] 性能限界を越えるCMOS デバイス技術 (2019)
  • Author(s): 高木信一
  • Organizer: 名古屋大学シリコンフロンティア・特別研究会, ～特定領域研究『ポストスケール』から10年を超えて～
  • Invited
• [Presentation] Ultra-Low Power III-V-Based Mosfets and Tunneling FETs (2018)
  • Author(s): S. Takagi, D.-h. Ahn, T. Gotow, C. Yokoyama, C.-Y. Chang, K. Endo, K. Katoh and M. Takenaka
  • Organizer: 233rd Electrochemical Society (ECS) Meeting, H02 - Advanced CMOS-Compatible Semiconductor Devices 18
  • Int'l Joint Research / Invited
• [Presentation] Hole mobility enhancement in extremely-thin-body strained GOI and SGOI pMOSFETs by improved Ge condensation method (2018)
  • Author(s): K.-W. Jo, W.-K. Kim, M. Takenaka, and S. Takagi
  • Organizer: Symposia on VLSI Technology
  • Int'l Joint Research
• [Presentation] MOS Device Technology using Alternative Channel Materials for Low Power Logic LSI (2018)
  • Author(s): S. Takagi, K. Kato, W.-K. Kim, K.-w. Jo, R. Matsumura, R. Takaguchi, D.-H. Ahn, T. Gotow and M. Takenaka
  • Organizer: 48th European Solid-State Device Research Conference (ESSDERC)
  • Int'l Joint Research / Invited
• [Presentation] Fabrication of InAs-on-Insulator structures by Smart Cut method with room temperature hydrogen implantation (2018)
  • Author(s): K. Sumita, K. Kato, M. Takenaka and S. Takagi
  • Organizer: 2018 International Conference on Solid State Devices and Materials (SSDM)
  • Int'l Joint Research
• [Presentation] InGaAs nチャネルMOSFETにおける界面準位発生と基板ホール電流の関係 (2018)
  • Author(s): 尹尚希, 張志宇, 安大煥, 竹中充, 高木信一
  • Organizer: 第79回応用物理学会秋季学術講演会
• [Presentation] Impact of SiGe Layer Thickness in Starting Substrates on Properties of Ultrathin Body Ge-on-insulator pMOSFETs fabricated by Ge Condensation (2018)
  • Author(s): Kwang-Won Jo, Wu-Kang Kim, Mitsuru Takenaka and Shinichi Takagi
  • Organizer: 第79回応用物理学会秋季学術講演会
• [Presentation] Improvement of SiGe MOS Interfaces Properties by TiN/Y2O3 Gate Stacks (2018)
  • Author(s): T. Lee, K. Kato, M. Ke, M. Takenaka, and S. Takagi
  • Organizer: 第79回応用物理学会秋季学術講演会
• [Presentation] Ultrathin-body Ge-On-Insulator MOSFET and TFET technologies (2018)
  • Author(s): S. Takagi, W.-K. Kim, K.-W. Jo, R. Matsumura, R. Takaguchi, T. Katoh, T.-E. Bae, K. Kato and M. Takenaka
  • Organizer: AiMES 2018 (ECS and SMEQ Joint International Meeting), Symposium G03: SiGe, Ge, and Related Materials: Materials, Processing, and Devices
  • Int'l Joint Research / Invited
• [Presentation] MOSトランジスタにおけるキャリアのフォノン散乱 (2018)
  • Author(s): 高木信一
  • Organizer: 応用物理学会第212回シリコンテクノロジー分科会研究集会
  • Invited
• [Presentation] Characterization and understanding of slow traps in GeOx-based n-Ge MOS interfaces (2018)
  • Author(s): M. Ke, P. Cheng, K. Kato, M. Takenaka, and S. Takagi
  • Organizer: IEEE International Electron Devices Meeting (IEDM)
  • Int'l Joint Research
• [Presentation] Correlation of interface state generation and InGaAs MOS interface properties (2018)
  • Author(s): S.-H. Yoon, D.-H. Ahn, C. Yokoyama, M. Takenaka, and S. Takagi
  • Organizer: 49th IEEE Semiconductor Interface Specialists Conference (SISC)
  • Int'l Joint Research
• [Presentation] Reduction in interface trap density of TiN/Y2O3/Si0.62Ge0.38 gate stacks with high temperature PMA (2018)
  • Author(s): T.-E. Lee, M. Ke, K. Kato, M. Takenaka, and S. Takagi
  • Organizer: 49th IEEE Semiconductor Interface Specialists Conference (SISC)
  • Int'l Joint Research
• [Presentation] HEtero-Layer-Lift-Off (HELLO) technology for enhanced hole mobility in UTB GeOI pMOSFETs (2018)
  • Author(s): W. H. Chang, T. Irisawa, H. Ishii, H. Hattori, N. Uchida and T. Maeda
  • Organizer: 2018 International Symposium on VLSI Technology, Systems and Applications
  • Int'l Joint Research
• [Presentation] Ultra-thin germanium-tin on insulator structure through direct bonding technique (2018)
  • Author(s): T. Maeda, W. H. Chang, T. Irisawa, H. Ishii, H. Oka, M. Kurosawa, Y. Imai, O. Nakatsuka and N. Uchida
  • Organizer: ISTDM/ICSI 2018
  • Int'l Joint Research
• [Presentation] Significant Performance Enhancement of UTB GeOI pMOSFETs by Advanced Channel Formation Technologies (2018)
  • Author(s): W. H. Chang, T. Irisawa, H. Ishii, H. Hattori, N. Uchida and T. Maeda
  • Organizer: Symposia on VLSI Technology
  • Int'l Joint Research
• [Presentation] Electron and Acoustic Phonon Confinement in Ultrathin-Body Ge on Insulator (2018)
  • Author(s): V. Poborchii, W. H. Chang, T. Irisawa, H. Ishii, H. Hattori, N. Uchida, J. Groenen, P. Geshev and T. Maeda
  • Organizer: 2018 International Conference on Solid State Devices and Materials (SSDM)
  • Int'l Joint Research
• [Presentation] High performance UTB GeOI n and pMOSFETs featuring HEtero-Layer-Lift-Off (HELLO) technology (2018)
  • Author(s): W. H. Chang, T. Irisawa, H. Ishii, H. Hattori, H. Ota, H. Takagi, Y. Kurashima, N. Uchida, and T. Maeda
  • Organizer: AiMES 2018 (ECS and SMEQ Joint International Meeting), Symposium G03: SiGe, Ge, and Related Materials: Materials, Processing, and Devices
  • Int'l Joint Research / Invited
• [Presentation] UTB-GeOI構造の超平坦化による正孔移動度向上 (2018)
  • Author(s): 張 文馨, 入沢 寿史, 石井 裕之, 内田 紀行, 前田 辰郎
  • Organizer: 第79回応用物理学会秋季学術講演会
• [Presentation] チャネル形成技術の高度化による極薄GeOI pMOSFETsの性能向上 (2018)
  • Author(s): 張 文馨, 入沢 寿史, 石井 裕之, 内田 紀行, 前田 辰郎
  • Organizer: 第210回シリコンテクノロジー研究集会
  • Invited
• [Presentation] モノリシック3D CMOS に向けたUTB-GeOI 構造の開発 (2018)
  • Author(s): 前田 辰郎, 張 文馨, 入沢 寿史, 石井 裕之, 内田 紀行
  • Organizer: 第24回電子デバイス界面テクノロジー研究会
• [Presentation] UTB-GeOIチャネル構造における裏面Siパッシベーションの効果 (2018)
  • Author(s): 張 文馨, 入沢 寿史, 石井 裕之, 内田 紀行, 前田 辰郎
  • Organizer: 第66回応用物理学会春季学術講演会
• [Presentation] Ge基板の平坦化RTAを用いたin-situ Ge MOS構造の作製 (2018)
  • Author(s): 石井 寛仁，張 文馨, 石井 裕之, 森田行則，遠藤聡, 藤代博記，前田 辰郎
  • Organizer: 第66回応用物理学会春季学術講演会
• [Presentation] ECRプラズマ酸化によるALD high-k/GeOx/Ge界面の遅い準位起源 (2018)
  • Author(s): 柯夢南, 竹中充, 高木信一
  • Organizer: 電子デバイス界面テクノロジー研究会―材料・プロセス・デバイス特性の物理―（第23回研究会）
• [Presentation] Extremely-Thin Body GOI structures and MOSFETs (2018)
  • Author(s): S. Takagi, W.-K. Kim, K. Jo, X. Yu and M. Takenaka
  • Organizer: 11th International WorkShop on New Group IV Semiconductor Nanoelectronics
  • Int'l Joint Research / Invited
• [Presentation] Ge系デバイスのヘテロジニアスインテグレーション技術 (2018)
  • Author(s): 前田辰郎
  • Organizer: 電子情報通信学会 システムナノ技術に関する時限研究専門委員会第3回研究会
  • Invited
• [Presentation] Physical origins of slow traps for ALD high-k dielectrics on GeOx/Ge interfaces (2018)
  • Author(s): M. Ke, K. Kato, M. Takenaka and S. Takagi
  • Organizer: 第65回応用物理学会春季学術講演会
• [Presentation] Al2O3/p-InxGa1-xAs MOS界面に与える前処理の効果 (2018)
  • Author(s): 横山千晶，張志宇，加藤公彦, 竹中充，高木信一
  • Organizer: 第65回応用物理学会春季学術講演会
• [Presentation] Smart Cut法を用いたInAs on Insulator構造の作製 (2018)
  • Author(s): 隅田圭, 竹中充, 高木信一
  • Organizer: 第65回応用物理学会春季学術講演会
• [Presentation] Ge MOSFETへの期待と課題 (2018)
  • Author(s): 高木信一, 曺光元, 金佑彊, 柯夢南, 加藤公彦, 竹中充
  • Organizer: 第65回応用物理学会春季学術講演会
  • Invited
• [Presentation] High quality UTB GeOI by HEtero-Layer-Lift-Off (HELLO) technology for future Ge CMOS application (2018)
  • Author(s): W.-H. Chang, T. Irisawa, H. Ishii, H. Hattori, Hi. Ota, H. Takagi, Y. Kurashima, N. Uchida, T. Maeda
  • Organizer: 第65回応用物理学会春季学術講演会
• [Presentation] 超薄膜ゲルマニウムのバンド構造 (2018)
  • Author(s): 前田辰郎, 張文馨, 入沢寿史, 石井裕之, 服部浩之, 内田紀行, 山内 淳
  • Organizer: 第65回応用物理学会春季学術講演会
  • Invited
• [Presentation] Ultra-Low Power III-V-Based Mosfets and Tunneling FETs (2018)
  • Author(s): S. Takagi, D.-H. Ahn, T. Gotow, C. Yokoyama, C.-Y. Chang, K. Endo, K. Katoh and M. Takenaka
  • Organizer: 233rd Electrochemical Society (ECS) Meeting, H02 - Advanced CMOS-Compatible Semiconductor Devices 18
  • Int'l Joint Research / Invited
• [Presentation] Ultrathin-body Ge-On-Insulator MOSFET and TFET technologies (2018)
  • Author(s): S. Takagi, W.-K. Kim, K.-W. Jo, R. Matsumura, R. Takaguchi, T. Katoh, T.-E. Bae, K. Kato and M. Takenaka
  • Organizer: 234th Electrochemical Society (ECS) Meeting, Symposium G03: SiGe, Ge, and Related Materials: Materials, Processing, and Devices
  • Int'l Joint Research / Invited
• [Presentation] High Performance 4.5-nm-Thick Compressively-Strained Ge-on-Insulator pMOSFETs Fabricated by Ge Condensation with Optimized Temperature Control (2017)
  • Author(s): W.-K. Kim, M. Takenaka and S. Takagi
  • Organizer: Sympia on VLSI technology
  • Int'l Joint Research
• [Presentation] First Experimental Observation of Channel Thickness Scaling Induced Electron Mobility Enhancement in UTB-GeOI nMOSFETs (2017)
  • Author(s): W. H. Chang, T. Irisawa, H. Ishii, H. Hattori, H. Ota, H. Takagi, Y. Kurashima, N. Uchida and T. Maeda
  • Organizer: Sympia on VLSI technology
  • Int'l Joint Research
• [Presentation] Low power III-V MOSFETs and TFETs on Si platform (2017)
  • Author(s): S. Takagi and M. Takenaka
  • Organizer: 9th International Conference on Materials for Advanced Technologies
  • Int'l Joint Research / Invited
• [Presentation] Interface state generation of Al2O3/InGaAs MOS structures by electrical stress (2017)
  • Author(s): S.-H. Yoon, C.-Y. Chang, D. H. Ahn, M. Takenaka and S. Takagi
  • Organizer: 20th Conference on Insulating Films on Semiconductors (INFOS 2017)
  • Int'l Joint Research
• [Presentation] Reduction of slow trap density of Al2O3/GeOx/n-Ge MOS interfaces by inserting ultrathin Y2O3 interfacial layers (2017)
  • Author(s): M. Ke, M. Takenaka, and S. Takagi
  • Organizer: 20th Conference on Insulating Films on Semiconductors (INFOS 2017)
  • Int'l Joint Research
• [Presentation] Understanding of slow traps generation in plasma oxidation GeOx/Ge MOS interfaces with ALD high-k layers (2017)
  • Author(s): M. Ke, M. Takenaka and S. Takagi
  • Organizer: 47th European Solid-State Device Research Conference (ESSDERC)
  • Int'l Joint Research
• [Presentation] Advanced Devices and Materials for Future CMOS-based IC Technologies (2017)
  • Author(s): S. Takagi
  • Organizer: International Electron Devices and Materials Symposium (IEDMS) 2017
  • Int'l Joint Research / Invited
• [Presentation] ALD Al2O3/GeOx/Ge界面の電子と正孔に対する遅い準位の物理的起源に関する考察 (2017)
  • Author(s): 柯夢南, 竹中充, 高木信一
  • Organizer: 第78回応用物理学会 秋季学術講演会
• [Presentation] 冷却レートを低減した酸化濃縮プロセスにより作製した高圧縮ひずみGOI pMOSFET (2017)
  • Author(s): 金佑彊, 竹中充, 高木信一
  • Organizer: 第78回応用物理学会 秋季学術講演会
  • Invited
• [Presentation] プラズマ酸化による酸化濃縮GOI層の薄膜化により作製した極薄ひずみGOI pMOSFETs (2017)
  • Author(s): 金佑彊, 竹中充, 高木信一
  • Organizer: 第78回応用物理学会 秋季学術講演会
• [Presentation] 電気ストレスによるAl2O3/InGaAs MOS界面における界面準位発生 (2017)
  • Author(s): 尹尚希, 張志宇, 安大煥, 竹中充, 高木信一
  • Organizer: 第78回応用物理学会 秋季学術講演会
• [Presentation] Effect of SiGe Layer Thickness in Starting Substrate on Electrical Properties of Ultrathin Body Ge-on-insulator pMOSFET fabricated by Ge Condensation (2017)
  • Author(s): K.-W. Jo, W.-K. Kim, M. Takenaka and S. Takagi
  • Organizer: 第78回応用物理学会 秋季学術講演会
• [Presentation] Effect of SiGe Layer Thickness in Starting Substrate on Electrical Properties of Ultrathin Body Ge-on-insulator pMOSFET fabricated by Ge Condensation (2017)
  • Author(s): K.-W. Jo, W.-K. Kim, M. Takenaka and S. Takagi
  • Organizer: 2017 International Conference on Solid State Devices and Materials (SSDM)
  • Int'l Joint Research
• [Presentation] Advanced MOS device technology (2017)
  • Author(s): S. Takagi
  • Organizer: 2017 International Conference on Solid State Devices and Materials (SSDM)
  • Int'l Joint Research / Invited
• [Presentation] Advanced MOS device technology for ultra-low power IoT applications (2017)
  • Author(s): S. Takagi
  • Organizer: 12th VDEC D2T Symposium
  • Invited
• [Presentation] MOS Interface Defect Control in Ge/IIIV Gate Stacks (2017)
  • Author(s): S. Takagi, M. Ke, C. Y. Chang, C. Yokoyama, M. Yokoyama, T. Gotow, K. Nishi, and M. Takenaka
  • Organizer: 232nd Electrochemical Society (ECS) Meeting, D01: Semiconductors, Dielectrics, and Metals for Nanoelectronics 15: In Memory of Samares Kar
  • Int'l Joint Research / Invited
• [Presentation] Ultra-low power MOSFET and Tunneling FET technologies using III-V and Ge (2017)
  • Author(s): S. Takagi and M. Takenaka
  • Organizer: 2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)
  • Int'l Joint Research / Invited
• [Presentation] Pre-cleaning Effects for Al2O3/p-InxGa1-xAs MOS Interfaces (2017)
  • Author(s): C. Yokoyama, C.-Y. Chang, M. Takenaka, and S. Takagi
  • Organizer: 48th IEEE Semiconductor Interface Specialists Conference (SISC)
  • Int'l Joint Research
• [Presentation] Discrimination of pre-existing and generated slow traps under electrical stress in Al2O3/GeOx/n-Ge gate stacks with plasma oxidation process (2017)
  • Author(s): M. Ke, M. Takenaka, and S. Takagi
  • Organizer: 48th IEEE Semiconductor Interface Specialists Conference (SISC)
  • Int'l Joint Research
• [Presentation] Relationship between interface state generation and substrate hole current in InGaAs n-channel MOSFETs (2017)
  • Author(s): S.-H. Yoon, D.-H. Ahn, M. Takenaka, and S. Takagi
  • Organizer: 48th IEEE Semiconductor Interface Specialists Conference (SISC)
  • Int'l Joint Research