Neural Network based VLSI architecture for HEVC Motion Estimation
Project/Area Number |
17J10356
|
Research Category |
Grant-in-Aid for JSPS Fellows
|
Allocation Type | Single-year Grants |
Section | 国内 |
Research Field |
Electron device/Electronic equipment
|
Research Institution | Waseda University |
Principal Investigator |
王 世豪 早稲田大学, 理工学術院(情報生産システム研究科), 特別研究員(DC2)
|
Project Period (FY) |
2017-04-26 – 2018-03-31
|
Project Status |
Discontinued (Fiscal Year 2017)
|
Budget Amount *help |
¥1,700,000 (Direct Cost: ¥1,700,000)
Fiscal Year 2017: ¥900,000 (Direct Cost: ¥900,000)
|
Keywords | CNN / Deep Learning |
Outline of Annual Research Achievements |
This research focuses on using newest deep learning algorithms and its implementation to improve motion estimation in video coding as it tightly affects the video coding quality and the energy consumption. The first year focuses on the hardware design part, which is to design an energy-efficient hardware architecture of deep learning algorithms. Specifically, the deep convolution neural networks are chosen for their superior performance on many image/video related tasks. I put efforts on two things, the scheduling algorithm for computing order and new hardware architectures. Both are regarded as the important issues in this fields as they affects on energy costs, which is critical for mobile devices. Both works are accepted in international conferences.
|
Research Progress Status |
29年度が最終年度であるため、記入しない。
|
Strategy for Future Research Activity |
29年度が最終年度であるため、記入しない。
|
Report
(1 results)
Research Products
(4 results)