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Bit-write minimizing codes for non-volatile memories and their application to normally-off computing

Research Project

Project/Area Number 17K19986
Research Category

Grant-in-Aid for Challenging Research (Exploratory)

Allocation TypeMulti-year Fund
Research Field Information science, computer engineering, and related fields
Research InstitutionWaseda University

Principal Investigator

Togawa Nozomu  早稲田大学, 理工学術院, 教授 (30298161)

Project Period (FY) 2017-06-30 – 2019-03-31
Project Status Completed (Fiscal Year 2018)
Budget Amount *help
¥6,500,000 (Direct Cost: ¥5,000,000、Indirect Cost: ¥1,500,000)
Fiscal Year 2018: ¥3,900,000 (Direct Cost: ¥3,000,000、Indirect Cost: ¥900,000)
Fiscal Year 2017: ¥2,600,000 (Direct Cost: ¥2,000,000、Indirect Cost: ¥600,000)
Keywords不揮発メモリ / 書込み削減符号 / 符号化 / ノーマリオフ計算
Outline of Final Research Achievements

Non-volatile memories play an important role in normally-off computing. Non-volatile memories have almost the same operation speed as the normal memories and its cell contents remain even if they are switched-off. However, non-volatile memories sometimes consume 10 times or more energy in writing compared to normal memories and how to reduce the number of writing bits is one of the largest problems. In this research, we developed bit-write reducing and error-correcting codes for non-volatile memories based on effectively clustering error-correcting codes. Experimental evaluation results demonstrate that the proposed bit-write reducing and error-correcting codes can be effectively applied to various classes of application programs.

Academic Significance and Societal Importance of the Research Achievements

不揮発メモリの活用には,いかに書込みビット数を削減するかが大きな焦点となっていた.加えて,メモリセルは誤りを起こすことがあり,書込み削減と誤り訂正とを両立することが実用上,大きな意味を持つ.本研究で提案した書込みビット数と誤り訂正を両立する符号は,理論的に誤り訂正能力を保持したままビット書込み数を抑えることを証明したと同時に,さまざまなアプリケーションプログラムに適用した結果,実際にビット書込み数の削減を確認している.しかも誤り訂正能力は,もとの符号のものと同一であることも理論的に示されている.これらは,不揮発メモリを用いたノーマリオフ計算の発展に大きな意味を持つものと考えられる.

Report

(3 results)
  • 2018 Annual Research Report   Final Research Report ( PDF )
  • 2017 Research-status Report
  • Research Products

    (8 results)

All 2019 2018 2017 Other

All Journal Article (1 results) (of which Peer Reviewed: 1 results) Presentation (6 results) (of which Int'l Joint Research: 4 results) Remarks (1 results)

  • [Journal Article] A Relaxed Bit-Write-Reducing and Error-Correcting Code for Non-Volatile Memories2018

    • Author(s)
      Tatsuro Kojo, Masashi Tawada, Masao Yanagisawa, and Nozomu Togawa
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

      Volume: E101.A Issue: 7 Pages: 1045-1052

    • DOI

      10.1587/transfun.E101.A.1045

    • NAID

      130007386623

    • ISSN
      0916-8508, 1745-1337
    • Year and Date
      2018-07-01
    • Related Report
      2018 Annual Research Report
    • Peer Reviewed
  • [Presentation] BER測定を用いたストカスティック数の誤り訂正2019

    • Author(s)
      石川遼太, 多和田雅師, 柳澤政生, 戸川望
    • Organizer
      電子情報通信学会・情報処理学会組込み技術とネットワークに関するワークショップ(ETNET2019)
    • Related Report
      2018 Annual Research Report
  • [Presentation] Landmark seasonal travel distribution and activity prediction based on language-specific analysis2018

    • Author(s)
      Siya Bao, Masao Yanagisawa, and Nozomu Togawa
    • Organizer
      2018 IEEE International Conference on Big Data (Big Data)
    • Related Report
      2018 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Personalized landmark recommendation for language-specific users by open data mining2018

    • Author(s)
      Siya Bao, Masao Yanagisawa, and Nozomu Togawa
    • Organizer
      17th IEEE/ACIS International Conference on Computer and Information Science (ICIS 2018)
    • Related Report
      2018 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Road-illuminance level inference across road networks based on bayesian analysis2018

    • Author(s)
      Siya Bao, Masao Yanagisawa, and Nozomu Togawa
    • Organizer
      IEEE International Conference on Consumer Electronics (ICCE)
    • Related Report
      2017 Research-status Report
    • Int'l Joint Research
  • [Presentation] Floorplan-driven high-level synthesis using volatile/non-volatile registers for hybrid energy-harvesting systems2017

    • Author(s)
      Daiki Asai, Masao Yanagisawa, and Nozomu Togawa
    • Organizer
      IEEE 12th International Conference on ASIC
    • Related Report
      2017 Research-status Report
    • Int'l Joint Research
  • [Presentation] 環境発電動作を想定した揮発・不揮発レジスタ併用型フロアプラン指向高位合成手法2017

    • Author(s)
      浅井大輝, 柳澤政生, 戸川望
    • Organizer
      情報処理学会DAシンポジウム2017
    • Related Report
      2017 Research-status Report
  • [Remarks]

    • URL

      http://www.togawa.cs.waseda.ac.jp/

    • Related Report
      2017 Research-status Report

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Published: 2017-07-21   Modified: 2020-03-30  

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