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Reconfigurable architecture with flexible dependability

Research Project

Project/Area Number 19300011
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section一般
Research Field Computer system/Network
Research InstitutionOsaka University

Principal Investigator

ONOYE Takao  Osaka University, 大学院・情報科学研究科, 教授 (60252590)

Co-Investigator(Kenkyū-buntansha) HASHIMOTO Masanori  大阪大学, 大学院・情報科学研究科, 准教授 (80335207)
MITSUYAMA Yukio  大阪大学, 大学院・工学研究科, 助教 (80346189)
HATANAKA Masahide  大阪大学, 大学院・情報科学研究科, 助手 (70346188)
岩永 信之  大阪大学, 大学院・言語文化研究科, 助教 (00402991)
Project Period (FY) 2007 – 2008
Project Status Completed (Fiscal Year 2008)
Budget Amount *help
¥14,430,000 (Direct Cost: ¥11,100,000、Indirect Cost: ¥3,330,000)
Fiscal Year 2008: ¥7,150,000 (Direct Cost: ¥5,500,000、Indirect Cost: ¥1,650,000)
Fiscal Year 2007: ¥7,280,000 (Direct Cost: ¥5,600,000、Indirect Cost: ¥1,680,000)
Keywords計算機アーキテクチャ / ディペンダビリティ / 再構成可能アーキテクチャ / 再構成可能集積回路 / ソフトエラー / 製造ばらつき / 冗長化 / 暗号化 / 自己診断 / 動作隠蔽 / ディベンダビリティ
Research Abstract

本研究では、集積回路に求められるディペンダビリティをソフトエラー耐性からデータ秘匿性、デバイス性能補償まで包括的に捕らえ、アプリケーションに応じて柔軟なディペンダビリティレベルを低オーバヘッドで実現する再構成可能集積回路に関する研究開発を行った。具体的には、1)可変冗長構成を実現する粗粒度再構成可能アーキテクチャの検討、2)回路構成情報およびチップ内/外通信の暗号化の検討、3)デバイスの自己診断、自己調整機能の検討を行った。

Report

(3 results)
  • 2008 Annual Research Report   Final Research Report ( PDF )
  • 2007 Annual Research Report
  • Research Products

    (24 results)

All 2009 2008 2007 Other

All Journal Article (11 results) (of which Peer Reviewed: 11 results) Presentation (13 results)

  • [Journal Article] An ExperimentalStudy on Body-Biasing Layout StyleFocusing on Area Efficiency and SpeedControllability2009

    • Author(s)
      K. Hamamoto, H. Fuketa, M. Hashimoto, Y.Mitsuyama, and T. Onoye
    • Journal Title

      IEICE Trans onElectronics vol.E92-C, no.2

      Pages: 281-285

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] An Experimental Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed Controllability2009

    • Author(s)
      K. Hamamoto, H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
    • Journal Title

      IEICE Trans, on Electronics vol. E92-C, no. 2

      Pages: 281-285

    • NAID

      110006935797

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Coarse-Grained Dynamically Reconfigurable Architecture with Flexible Reliability2009

    • Author(s)
      Y. Ko, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, T. Onoye
    • Journal Title

      Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (発表予定)

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Journal Article] A Coarse-Grained Dynamically Reconfigurable Architecture Enabling Flexible Reliability2009

    • Author(s)
      D. Alnajjar, Y. Ko, T. Imagawa, M. Hiroraoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, T. Onoye
    • Journal Title

      Proceedings of Workshop on System Effects of Logic Soft Errors (SELSE) (発表予定)

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Trade-Off Analysis between Timing Error Rate and Power Dissipation for Adaptive Speed Control with Timing Error Prediction2009

    • Author(s)
      H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
    • Journal Title

      Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC)

      Pages: 266-271

    • NAID

      10026861488

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Journal Article] マルコフモデルによるオシレータサンプリング方式真性乱数生成器の乱数品質解析2009

    • Author(s)
      天木 健彦, 橋本 昌宜, 密山 幸男, 尾上 孝雄
    • Journal Title

      第22回 回路とシステム(軽井沢)ワークショップ論文集 (発表予定)

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Area-EfficientReconfigurable Architecture for MediaProcessing2008

    • Author(s)
      Y. Mitsuyama, K. Takahashi, R. Imai, M.Hasimoto, and T. Onoye
    • Journal Title

      IEICE Trans on Fundamentalsof Electronics, Communications andComputer Sciences vol.E91-A, no.12

      Pages: 3651-3662

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] Experimental Study on Body-Biasing Layout Style -- Negligible Area Overhead Enables Sufficient Speed Controllability --2008

    • Author(s)
      K. Hamamoto, H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
    • Journal Title

      Proc. ACM Great Lake Symposium on VLSI (GLSVLSI)

      Pages: 387-390

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Experimental study on body-biasing layout style - negligible area overhead enables sufficient speed controllability -2008

    • Author(s)
      K. Hamamoto
    • Journal Title

      Proceeding of ACM Great Lake Symposium on VLSI (GLSVLSI) (掲載決定)

    • Related Report
      2007 Annual Research Report
    • Peer Reviewed
  • [Journal Article] A study on body-biasing layout style focusing on area efficiency and speed2007

    • Author(s)
      K. Hamamoto
    • Journal Title

      Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI)

      Pages: 233-237

    • Related Report
      2007 Annual Research Report
    • Peer Reviewed
  • [Journal Article] 製造・環境ばらつきと動的性能補償を考慮したタイミング検証に向けて2007

    • Author(s)
      橋本 昌宜
    • Journal Title

      第20回 回路とシステム(軽井沢)ワークショップ論文集

      Pages: 661-666

    • Related Report
      2007 Annual Research Report
    • Peer Reviewed
  • [Presentation] レイアウトを考慮した基板バイアスクラスタリング手法2009

    • Author(s)
      濱本浩一, 橋本昌宜, 密山幸男, 尾上孝雄
    • Organizer
      電子情報通信学会VLSI設計技術研究会
    • Place of Presentation
      那覇市
    • Year and Date
      2009-03-13
    • Related Report
      2008 Annual Research Report
  • [Presentation] マルコフモデルによるオシレータサンプリング方式真性乱数生成器の乱数品質解析2009

    • Author(s)
      天木健彦, 橋本昌宜, 密山幸男, 尾上孝雄
    • Organizer
      電子情報通信学会第22回
    • Place of Presentation
      回路とシステム(軽井沢) ワークショップ
    • Related Report
      2008 Final Research Report
  • [Presentation] A Coarse-GrainedDynamically Reconfigurable ArchitectureEnabling Flexible Reliability2009

    • Author(s)
      D. Alnajjar, Y. Ko, T. Imagawa, M.Hiromoto, Y. Mitsuyama, M. Hashimoto, H.Ochi, and T. Onoye
    • Organizer
      in Proc.IEEE Workshop on System Effects of LogicSoft Errors (SELSE)
    • Related Report
      2008 Final Research Report
  • [Presentation] Coarse-GrainedDynamically Reconfigurable Architecturewith Flexible Reliability2009

    • Author(s)
      Y. Ko, D. Alnajjar, Y. Mitsuyama, M.Hashimoto, and T. Onoye
    • Organizer
      in Proc. 15thWorkshop on Synthesis and SystemIntegration of Mixed Technologies (SASIMI2009)
    • Related Report
      2008 Final Research Report
  • [Presentation] 柔軟な信頼性を実現する粗粒度再構成可能アーキテクチャの検討2008

    • Author(s)
      高 永勲, Dawood Alnajjar, 密山幸男, 橋本昌宜, 尾上孝雄
    • Organizer
      電子情報通信学会ディペンダブルコンピューティング研究会
    • Place of Presentation
      北九州市
    • Year and Date
      2008-11-17
    • Related Report
      2008 Annual Research Report
  • [Presentation] タイミングエラー予告を用いた適応的速度制御におけるタイミングエラー頻度と消費電力のトレードオフ解析2008

    • Author(s)
      更田裕司, 橋本昌宜, 密山幸男, 尾上孝雄
    • Organizer
      情報処理学会DAシンポジウム
    • Place of Presentation
      浜松市
    • Year and Date
      2008-08-27
    • Related Report
      2008 Annual Research Report
  • [Presentation] 基板バイアス印加レイアウト方式の面積効率と速度制御性の評価2008

    • Author(s)
      濱本浩一, 更田裕司, 橋本昌宜, 密山幸男, 尾上孝雄
    • Organizer
      電子情報通信学会 VLSI設計技術研究会
    • Place of Presentation
      札幌市
    • Year and Date
      2008-06-26
    • Related Report
      2008 Annual Research Report
  • [Presentation] 柔軟な信頼性を実現する粗粒度再構成可能アーキテクチャの検討(DC2008-41)2008

    • Author(s)
      高永勲, Dawood Alnajjar, 密山幸男, 橋本昌宜, 尾上孝雄
    • Organizer
      電子情報通信学会技術研究報告
    • Related Report
      2008 Final Research Report
  • [Presentation] 基板バイアス印加レイアウト方式の面積効率と速度制御性の評価(VLD2008-27)2008

    • Author(s)
      濱本浩一, 更田裕司, 橋本昌宜, 密山幸男, 尾上孝雄
    • Organizer
      電子情報通信学会技術研究報告
    • Related Report
      2008 Final Research Report
  • [Presentation] ExperimentalStudy on Body-Biasing Layout Style --Negligible Area Overhead EnablesSufficient Speed Controllability --2008

    • Author(s)
      K. Hamamoto, H. Fuketa, M. Hashimoto, Y.Mitsuyama, and T. Onoye
    • Organizer
      inProc. ACM Great Lake Symposium on VLSI(GLSVLSI 2008)
    • Related Report
      2008 Final Research Report
  • [Presentation] A Study onBody-Biasing Layout Style Focusing on AreaEfficiency and Speed2007

    • Author(s)
      K. Hamamoto, H. Fuketa, M. Hashimoto, Y.Mitsuyama, and T. Onoye
    • Organizer
      in Proc. 14thWorkshop on Synthesis and SystemIntegration of Mixed Technologies (SASIMI2007)
    • Related Report
      2008 Final Research Report
  • [Presentation] 製造・環境ばらつきと動的性能補償を考慮したタイミング検証に向けて2007

    • Author(s)
      橋本昌宜
    • Organizer
      電子情報通信学会第20回
    • Place of Presentation
      回路とシステム( 軽井沢) ワークショップ
    • Related Report
      2008 Final Research Report
  • [Presentation] Tuning-Friendly Body BiasClustering for Compensating RandomVariability in Subthreshold Circuits(to appear)

    • Author(s)
      K. Hamamoto, M. Hashimoto, Y. Mitsuyama, and T. Onoye
    • Organizer
      Proceedings of IEEE/ACM InternationalSymposium on Low Power Electronics andDesign (ISLPED)
    • Related Report
      2008 Final Research Report

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Published: 2007-04-01   Modified: 2016-04-21  

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