Efficient Quantum Circuit Design Methods Considering Error Correction
Project/Area Number |
19700010
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Research Category |
Grant-in-Aid for Young Scientists (B)
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Allocation Type | Single-year Grants |
Research Field |
Fundamental theory of informatics
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Research Institution | Nara Institute of Science and Technology |
Principal Investigator |
YAMASHITA Shigeru Nara Institute of Science and Technology, 情報理工学部, 教授 (30362833)
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Project Period (FY) |
2007 – 2010
|
Project Status |
Completed (Fiscal Year 2010)
|
Budget Amount *help |
¥3,230,000 (Direct Cost: ¥2,600,000、Indirect Cost: ¥630,000)
Fiscal Year 2010: ¥780,000 (Direct Cost: ¥600,000、Indirect Cost: ¥180,000)
Fiscal Year 2009: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000)
Fiscal Year 2008: ¥780,000 (Direct Cost: ¥600,000、Indirect Cost: ¥180,000)
Fiscal Year 2007: ¥500,000 (Direct Cost: ¥500,000)
|
Keywords | 量子計算 / 量子回路設計 / LNN / エラー / 設計検証 / エラー訂正 / 等価性判定 / 多準位 |
Research Abstract |
The following methods have been proposed and evaluated for error robust quantum circuit design. (1) A method to reduce the number of error corrections for fault-tolerant quantum computation, (2) A circuit design method to use a multilevel quantum system, (3) Efficient LNN circuit design methods, (4) An efficient verification method for quantum circuits, (5) An efficient design method for large quantum circuits, and (6) An analysis of quantum walks.
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Report
(6 results)
Research Products
(70 results)
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[Presentation] 非有界誤り一方向量子および古典通信計算量2007
Author(s)
岩間一雄, 西村治道, ルディーレイモンド, 山下茂
Organizer
第16回量子情報技術研究会,QIT2007-26,pp.106-111
Place of Presentation
NTT厚木研究開発センタ(神奈川県)
Year and Date
2007-05-18
Related Report
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