| Project/Area Number |
20700043
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| Research Category |
Grant-in-Aid for Young Scientists (B)
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| Allocation Type | Single-year Grants |
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| Research Field |
Computer system/Network
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| Research Institution | Tohoku University |
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Principal Investigator |
MIYAMOTO Naoto Tohoku University, 未来科学技術共同研究センター, 助教 (60400462)
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| Project Period (FY) |
2008 – 2009
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| Project Status |
Completed (Fiscal Year 2009)
|
| Budget Amount *help |
¥2,730,000 (Direct Cost: ¥2,100,000、Indirect Cost: ¥630,000)
Fiscal Year 2009: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2008: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
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| Keywords | リコンフィギャラブルシステム / 動的再構成 / FPGA / 三次元積層 / 電子デバイス・機器 / Field Programmable Gate Array / システムオンチップ / 計算機システム / 設計自動化 / 3次元積層 |
|---|
| Research Abstract |
The optimal architecture of 4-dimensional FPGA, a 3-dimensional stacking of dynamically reconfigurable FPGAs, is cube structure. However, it is found that FPGA with 1000 or less tiles still has higher logic density without 3-dimensional stacking. Temporal communication module and temporal partitioning algorithm make 4-dimensional FPGA possible to emulate with the same speed performance as FPGA. Future issues will be high speed placement-and-route algorithm and thermal problem.
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