Development of Dependable Low-power Protocols for Wireless Sensor Networks
Project/Area Number |
21500074
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Research Category |
Grant-in-Aid for Scientific Research (C)
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Allocation Type | Single-year Grants |
Section | 一般 |
Research Field |
Computer system/Network
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Research Institution | Kobe University |
Principal Investigator |
OHTA Chikara 神戸大学, 大学院・システム情報学研究科, 准教授 (10272254)
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Project Period (FY) |
2009 – 2011
|
Project Status |
Completed (Fiscal Year 2011)
|
Budget Amount *help |
¥4,420,000 (Direct Cost: ¥3,400,000、Indirect Cost: ¥1,020,000)
Fiscal Year 2011: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000)
Fiscal Year 2010: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2009: ¥1,820,000 (Direct Cost: ¥1,400,000、Indirect Cost: ¥420,000)
|
Keywords | センサネットワーク / 省電力 / 信頼性 / ネットワークプロトコル / シミュレータ |
Research Abstract |
Wireless sensor networks are expected to realize various monitoring systems such as disaster monitoring for river floodplain, forest fire and so on. Sensor networks need to collect sensed data reliably as long time as possible. In this study, we developed network protocols such as reliable broadcasting schemes, adaptive modulation schemes, and path construction schemes to realize reliable data gathering considering power consumption, and verified their effectiveness by means of network simulations and demonstration experiments.
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Report
(4 results)
Research Products
(31 results)
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[Journal Article] A 58-uW Single-Chip Sensor Node Processor with Communication Centric Design2010
Author(s)
Shintaro Izumi, Takashi Takeuchi, Takashi Matsuda, Hyeokjong Lee, Toshihiro Konishi, Koh Tsuruda, Yasuharu Sakai, Hiroshi Kawaguchi, Chikara Ohta, and Masahiko Yoshimoto
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Journal Title
IEICE Transactions on Electronics
Volume: vol.E93-C, no.3
Pages: 261-269
Related Report
Peer Reviewed
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[Journal Article] A 58-μW Single-Chip Sensor Node Processor Using Synchronous MAC Protocol2009
Author(s)
Takashi Takeuchi, Shintaro Izumi, Takashi Matsuda, Hyeokjong Lee, Yu Otake, Toshihiro Konishi, Koh Tsuruda, Yasuharu Sakai, Hidehiro Fujiwara, Chikara Ohta, Hiroshi Kawaguchi, and Masahiko Yoshimoto
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Journal Title
Proc. 2009 Symposia on VLSI Technology and Circuits
Pages: 290-291
NAID
Related Report
Peer Reviewed
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