Systematic Design Scheme for Process-Variation-Free Highly Dependable Multiple-Valued VLSI

• Project/Area Number: 21700051
• Research Category: Grant-in-Aid for Young Scientists (B)
• Allocation Type: Single-year Grants
• Research Field: Computer system/Network
• Research Institution: Tohoku University
• Principal Investigator: NATSUI Masanori 東北大学, 電気通信研究所, 助教 (10402661)
• Project Period (FY): 2009 – 2011
• Project Status: Completed (Fiscal Year 2011)
• Budget Amount: ¥4,290,000 (Direct Cost: ¥3,300,000、Indirect Cost: ¥990,000); Fiscal Year 2011: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000); Fiscal Year 2010: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000); Fiscal Year 2009: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
• Keywords: VLSI設計技術 / 回路設計技術 / 先端機能デバイス / 多値集積回路 / 計算機システム / 半導体超微細化

Research Abstract

This research aimed to develop a systematic design scheme for process-variation-free multiple-valued VLSI. Through establishment of a high-level synthesis/verification tool for multiple-valued logic circuit, and design and performance verification of a variation-aware multiple-valued logic LSI based on nonvolatile memory device, it is confirmed to be able to realize high-performance and highly-dependable VLSIs by using the proposed method.

Research Products

• [Journal Article] Scalable Serial-Configuration Scheme for MTJ/MOS-Hybrid Variation-Resilient VLSI System (2012)
  • Author(s): M. Natsui and T. Hanyu
  • Journal Title: 10th IEEE International NEWCAS Conference Volume: (掲載確定)
  • Peer Reviewed
• [Journal Article] Variation-Resilient Current-Mode Logic Circuit Design Using MTJ Devices (2012)
  • Author(s): Y. Kim, M. Natsui M and T. Hanyuand
  • Journal Title: Proceedings of 2012 IEEE International Symposium on Circuits & Systems Volume: (掲載確定)
  • Peer Reviewed
• [Journal Article] Variation-Resilient Current-Mode Logic Circuit Design Using MTJ Devices (2012)
  • Author(s): Y.Kim, M.Natsui, T.Hanyu
  • Journal Title: Proceedings of 2012 IEEE International Symposium on Circuits & Systems Volume: (掲載確定)
  • Peer Reviewed
• [Journal Article] MTJ-Based Optimal Vth-Tuning Technique for a Process-Variation-Aware VLSI processor (2011)
  • Author(s): M. Natsui, Y. Kim and T. Hanyu
  • Journal Title: Proceedings of the 56th Magnetism and Magnetic Materials Conference Pages: 480-481
  • Peer Reviewed
• [Journal Article] MTJ-Based Optimal Vth-Tuning Technique for a Process-Variation-Aware VLSI processor (2011)
  • Author(s): M.Natsui, Y.Kim, T.Hanyu
  • Journal Title: Proceedings of the 56th Magnetism and Magnetic Materials Conference Pages: 480-481
  • Peer Reviewed
• [Journal Article] Low-Energy Pipelined Multiple-Valued Current-Mode Circuit with 8-Level Static Current-Source Control (2010)
  • Author(s): M. Natsui, T. Arimitsu and T. Hanyu
  • Pages: 235-240
  • Peer Reviewed
• [Journal Article] Process-Variation-Aware VLSI Design Using Emerging Functional Devices and Its Impact (2010)
  • Author(s): M. Natsui and T. Hanyu
  • Journal Title: Booklet of the 19th International Workshop on Post-Binary ULSI Systems Pages: 20-25
• [Presentation] Vth補償機能を有するMOS/MTJハイブリッド電流モードロジックとその最適化 (2012)
  • Author(s): キムヨンクン, 夏井雅典, 羽生貴弘
  • Organizer: 第25回多値論理とその応用研究会
  • Place of Presentation: 宮崎観光ホテル
  • Year and Date: 2012-01-08
• [Presentation] 不揮発性可変抵抗素子を用いたLSIパラメータばらつき最小化アルゴリズムの検討 (2011)
  • Author(s): キムヨンクン, 夏井雅典, 羽生貴弘
  • Organizer: 平成23年度電気関係学会東北支部連合大会
  • Place of Presentation: 東北学院大学
  • Year and Date: 2011-08-26
• [Presentation] 不揮発性ロジックインメモリアーキテクチャに基づく高信頼VLSI設計技術 (2011)
  • Author(s): 夏井雅典, 羽生貴弘
  • Organizer: 第73回ニューパラダイムコンピューティング研究会
  • Place of Presentation: 会津大学
  • Year and Date: 2011-07-30
• [Presentation] 不揮発性ロジックインメモリアーキテクチャが拓く新概念VLSI設計パラダイム (2011)
  • Author(s): 夏井雅典, 羽生貴弘
  • Organizer: LSIとシステムのワークショップ2011
  • Place of Presentation: 北九州国際会議場
  • Year and Date: 2011-05-16
• [Presentation] Low-Energy Pipelined Multiple-Valued Current-Mode Circuit with 8-Level Static Current-Source Control (2010)
  • Author(s): Masanori Natsui
  • Organizer: 40th IEEE International Symposium on Multiple-Valued Logic
  • Place of Presentation: Casa Convalescencia(バルセロナ,スペイン)
  • Year and Date: 2010-05-26
• [Presentation] Process-Variation-Aware VLSI Design Using Emerging Functional Devices and Its Impact (2010)
  • Author(s): Masanori Natsui
  • Organizer: 19th International Workshop on Post-Binary ULSI Systems
  • Place of Presentation: Casa Convalescencia(バルセロナ,スペイン)
  • Year and Date: 2010-05-25
• [Presentation] 適応的電流制御に基づく低電力パイプライン形多値電流モード回路の構成 (2010)
  • Author(s): 有光貴志, 夏井雅典, 羽生貴弘
  • Organizer: 第23回多値論理とその応用研究会
  • Place of Presentation: 明治大学
  • Year and Date: 2010-01-09
• [Presentation] ポストプロセスばらつき補償形回路アーキテクチャの一検討 (2010)
  • Author(s): 夏井雅典, 羽生貴弘
  • Organizer: 第23回多値論理とその応用研究会
  • Place of Presentation: 明治大学
  • Year and Date: 2010-01-09
• [Presentation] ポストプロセスばらつき補償形回路アーキテクチャの一検討 (2010)
  • Author(s): 夏井雅典
  • Organizer: 第23回多値論理とその応用研究会
  • Place of Presentation: 明治大学(東京都)
  • Year and Date: 2010-01-09
• [Presentation] 適応的電流制御に基づく低電力パイプライン形多値電流モード回路の構成 (2010)
  • Author(s): 有光貴志
  • Organizer: 第23回多値論理とその応用研究会
  • Place of Presentation: 明治大学(東京都)
  • Year and Date: 2010-01-09
• [Presentation] MOS/MTJ-Hybrid Circuit with Nonvolatile Logic-in-Memory Architecture (2009)
  • Author(s): M. Natsui and T. Hanyu
  • Organizer: 2009 International Conference on Solid State Devices and Materials (SSDM2009)
  • Place of Presentation: 東北大学
  • Year and Date: 2009-10-06
• [Presentation] MOS/MTJ-Hybrid Circuit with Nonvolatile Logic-in-Memory Architecture (2009)
  • Author(s): 夏井雅典
  • Organizer: 2009 International Conference on Solid State Devices and Materials(SSDM2009)
  • Place of Presentation: 東北大学(仙台市)
  • Year and Date: 2009-10-06
• [Presentation] 二次元LUTを用いた電流モード多値回路向け高速・高精度動作検証手法の一考察 (2009)
  • Author(s): 有光貴志, 夏井雅典, 羽生貴弘
  • Organizer: 平成21年度電気関係学会東北支部連合大会
  • Place of Presentation: 東北文化学園大学
  • Year and Date: 2009-08-20
• [Presentation] 二次元LUTを用いた電流モード多値回路向け高速・高精度動作検証手法の一考察 (2009)
  • Author(s): 有光貴志
  • Organizer: 平成21年度電気関係学会東北支部連合大会
  • Place of Presentation: 東北文化学園大学(仙台市)
  • Year and Date: 2009-08-20
• [Remarks]
  • URL: http://www.ngc.riec.tohoku.ac.jp/