Study on calibration technique of large scale mixed-signal integrated circuits
Project/Area Number |
21760264
|
Research Category |
Grant-in-Aid for Young Scientists (B)
|
Allocation Type | Single-year Grants |
Research Field |
Electron device/Electronic equipment
|
Research Institution | Keio University |
Principal Investigator |
ISHIKURO Hiroki Keio University, 理工学部, 准教授 (80433738)
|
Project Period (FY) |
2009 – 2010
|
Project Status |
Completed (Fiscal Year 2010)
|
Budget Amount *help |
¥4,550,000 (Direct Cost: ¥3,500,000、Indirect Cost: ¥1,050,000)
Fiscal Year 2010: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2009: ¥3,250,000 (Direct Cost: ¥2,500,000、Indirect Cost: ¥750,000)
|
Keywords | アナログディジタル混載回路 / モニター回路 / キャリブレーション / サンプリング回路 |
Research Abstract |
A monitoring circuit which can detect frequency and transient response of analog circuit blocks in large scale mixed-signal integrated circuits has been developed. A sampling circuit with both positive and negative bootstrapped clock generator has been proposed. Fabricated test chips successfully demonstrated the wide frequency and dynamic range operation. An area efficient phase interpolator has been proposed and designed for the monitoring of phase characteristics of the analog circuit blocks. The size of the developed monitoring circuit is smaller than 0.1mm-square and can be embedded in the LSI for the monitoring and calibration of analog circuit blocks.
|
Report
(3 results)
Research Products
(7 results)