| Budget Amount *help |
¥4,420,000 (Direct Cost: ¥3,400,000、Indirect Cost: ¥1,020,000)
Fiscal Year 2013: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2012: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2011: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
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| Research Abstract |
We propose fault-based BIST(Built-In Self Test) schemes for Anlog part of AMS(Analog Mixed-Signal) system LSI. The BIST systems can be used throughout life time of LSIs, from fabrication process to the system's operation. The motif of analog system to design BIST system is Anlog-to-Digital or Digital-to-Analog data convertor which is commonly used sub-system in AMS LSI systems.
We chose 3 types of circuits which compose the data convertor, which are R-2R ladder type Digital-to-Analog convetor, Fully-differential sample-and-hold circuit, and Operational Amplifers with different architectures. The BIST systems are based on transient respose of circuits and fault coverage for Caterstrofic faults, such like open/short fault of circuit elements, are about 86% to 96% with resonable area overhead.
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