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Highly-parallel and high-performance CAE system based on revolutionary analysis method for high-speed signaling

Research Project

Project/Area Number 24300018
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypePartial Multi-year Fund
Section一般
Research Field Computer system/Network
Research InstitutionShizuoka University

Principal Investigator

ASAI Hideki  静岡大学, 電子工学研究所, 教授 (40175823)

Research Collaborator HASEGAWA Takahiro  静岡大学, 基盤情報センター, 准教授 (40293609)
INOUE Yuta  静岡大学, 学術研究員 (70538024)
SEIKINE Tadatoshi  日本学術振興会, 特別研究員 (00765993)
Project Period (FY) 2012-04-01 – 2015-03-31
Project Status Completed (Fiscal Year 2014)
Budget Amount *help
¥18,200,000 (Direct Cost: ¥14,000,000、Indirect Cost: ¥4,200,000)
Fiscal Year 2014: ¥4,680,000 (Direct Cost: ¥3,600,000、Indirect Cost: ¥1,080,000)
Fiscal Year 2013: ¥4,420,000 (Direct Cost: ¥3,400,000、Indirect Cost: ¥1,020,000)
Fiscal Year 2012: ¥9,100,000 (Direct Cost: ¥7,000,000、Indirect Cost: ¥2,100,000)
Keywords回路とシステム / シグナル・インテグリティ / パワー・インテグリティ / 大規模シミュレーション / 並列計算 / CAE / 高速信号 / HPC / 革新的解析手法 / 高速伝送回路設計 / 多並列CAEシステム / シミュレーション工学 / パワー・インテグリティ / シグナル・インテグリティ
Outline of Final Research Achievements

With the progress of integration technology, high-density and high-speed electronic systems have been developed. As a result, the way how to guarantee the quality of power/signal has become very important and the some kind or another novel modeling and verification methodologies have been demanded.
In this research, an efficient simulation method has been proposed and the CAE (Computer-Aided Engineering) system composed of the PC cluster with GPUs (Graphics Processing Units) has been developed, which has the world record class of performance.

Report

(4 results)
  • 2014 Annual Research Report   Final Research Report ( PDF )
  • 2013 Annual Research Report
  • 2012 Annual Research Report

Research Products

(26 results)

All 2015 2014 2013 2012

All Journal Article (2 results) (of which Peer Reviewed: 1 results) Presentation (24 results) (of which Invited: 8 results)

  • [Journal Article] 高速三次元電磁界・回路シミュレーション技術の現状と将来展望~アルゴリズムと並列計算の観点から~2014

    • Author(s)
      浅井秀樹、井上雄太、關根惟敏
    • Journal Title

      電子情報通信学会、基礎境界ソサイエティ、Fundamentals Review

      Volume: 7 Pages: 197-209

    • NAID

      130004554800

    • Related Report
      2013 Annual Research Report
  • [Journal Article] 節点ブロック緩和法を用いた不均一な多導体伝送線路の高速過渡解析2013

    • Author(s)
      高崎貴大、關根惟敏、浅井秀樹
    • Journal Title

      電子情報通信学会論文誌(C)

      Volume: vol.J96-C(印刷中)

    • NAID

      110009611478

    • Related Report
      2012 Annual Research Report
    • Peer Reviewed
  • [Presentation] 三つのI(SI/PI/EMI)-昨日、今日、そして明日-(フェロー受賞記念講演)2015

    • Author(s)
      浅井秀樹
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      立命館大学(滋賀県草津市)
    • Year and Date
      2015-03-12
    • Related Report
      2014 Annual Research Report
    • Invited
  • [Presentation] 次世代SI/PI/EMIシミュレーション技術(チュートリアル企画)2015

    • Author(s)
      浅井秀樹
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      立命館大学(滋賀県草津市)
    • Year and Date
      2015-03-11
    • Related Report
      2014 Annual Research Report
    • Invited
  • [Presentation] マルチGPU LIMを用いた大規模回路網の高速過渡解析2014

    • Author(s)
      井上雄太,浅井秀樹
    • Organizer
      電子情報通信学会環境電磁工学研究会
    • Place of Presentation
      静岡大学(静岡県浜松市)
    • Year and Date
      2014-12-19
    • Related Report
      2014 Annual Research Report
  • [Presentation] チップ・パッケージ・ボード・筐体協調設計のためのSI/PI/EMIシミュレーション技術とその活用 ―マルチドメイン・シミュレーション―2014

    • Author(s)
      浅井秀樹
    • Organizer
      電子情報通信学会環境電磁工学研究会
    • Place of Presentation
      静岡大学(静岡県浜松市)
    • Year and Date
      2014-12-19
    • Related Report
      2014 Annual Research Report
    • Invited
  • [Presentation] Fast Circuit Transient Simulation based on Multi-GPU LIM2014

    • Author(s)
      Yuta Inoue, Hideki Asai
    • Organizer
      第16回高柳シンポジウム
    • Place of Presentation
      静岡大学(静岡県浜松市)
    • Year and Date
      2014-12-12
    • Related Report
      2014 Annual Research Report
  • [Presentation] Toward Reduction and Optimization of Common-mode Noise for Automotive EMC Design (Special talk)2014

    • Author(s)
      Hideki Asai
    • Organizer
      EPEPS 2014
    • Place of Presentation
      Portland, OR, USA
    • Year and Date
      2014-10-28
    • Related Report
      2014 Annual Research Report
    • Invited
  • [Presentation] Advanced Modeling and Simulation Techniques for 3-D SI/PI/EMI Design2014

    • Author(s)
      Hideki Asai
    • Organizer
      AVIC/4S 2014
    • Place of Presentation
      Ho Chi Minh, Vietnam
    • Year and Date
      2014-10-23
    • Related Report
      2014 Annual Research Report
    • Invited
  • [Presentation] Accelerating the Large-Scale Simulation of Power Distribution Networks by Using the Multi-GPU LIM2014

    • Author(s)
      Yuta Inoue, Hideki Asai
    • Organizer
      2014 IEEE International Conf. on SI/PI
    • Place of Presentation
      Raleigh, NC, USA
    • Year and Date
      2014-08-07
    • Related Report
      2014 Annual Research Report
  • [Presentation] SI/PI/EMI Issues and Exploitation of CAE in High-Speed Electronic Design(Tutorial)2014

    • Author(s)
      Hideki Asai
    • Organizer
      2014 IEEE International Conf. on SI/PI
    • Place of Presentation
      Raleigh, NC, USA
    • Year and Date
      2014-08-04
    • Related Report
      2014 Annual Research Report
    • Invited
  • [Presentation] Accelerating the Large-Scale Simulation of Power Distribution Networks by Using the Multi-GPU LIM2014

    • Author(s)
      Yuta Inoue, Hideki Asai
    • Organizer
      IEEE Int’l Conf. on Signal Integrity & Power Integrity
    • Place of Presentation
      Raleigh Convention Center (Raleigh, NC, USA)
    • Related Report
      2013 Annual Research Report
  • [Presentation] SI/PI/EMI Issues and Exploitation of CAE in High-Speed Electronic Design2014

    • Author(s)
      Hideki Asai
    • Organizer
      IEEE Int'l Conf. on Signal Integrity & Power Integrity
    • Place of Presentation
      Raleigh Convention Center (Raleigh, NC, USA)
    • Related Report
      2013 Annual Research Report
    • Invited
  • [Presentation] Efficient Electromagnetic Simulation of Multi-Layered PCB with CMOS Inverter by Using HIE/C-FDTD Method2013

    • Author(s)
      Yuta Inoue, Hideaki Muraoka, and Hideki Asai
    • Organizer
      URSI AP-RASC (Asia-Pacific Radio Science Conf.) 2013
    • Place of Presentation
      Howrd International House (Taipei, Taiwan)
    • Related Report
      2013 Annual Research Report
  • [Presentation] Locally Implicit Block Leapfrog Scheme for PDN Simulation2013

    • Author(s)
      Hideki Asai
    • Organizer
      IEEE ICEAA (Int'l Conf. on Electromagnetics in Advanced Applications) 2013
    • Place of Presentation
      Centro Congressi TORINO INCONTRA (Torino, Italy)
    • Related Report
      2013 Annual Research Report
    • Invited
  • [Presentation] Multi-GPU HIE-FDTD Method for the Solution of Large Scale Electromagnetic Problems2013

    • Author(s)
      Yuta Inoue, Hideki Asai
    • Organizer
      IEEE EDAPS (Electrical Design of Advanced Packaging & Systems Symp.) 2013
    • Place of Presentation
      Nara Todaiji Cultural Center (Nara, Japan)
    • Related Report
      2013 Annual Research Report
  • [Presentation] An Explicit and Unconditionally Stable Finite Difference Scheme for the Fast Transient Analysis of a Power Distribution Network2012

    • Author(s)
      Norio Nishizaki, Tadatoshi Sekine, and Hideki Asai
    • Organizer
      EDAPS2012
    • Place of Presentation
      台北、(中華民国)
    • Year and Date
      2012-12-10
    • Related Report
      2012 Annual Research Report
  • [Presentation] Fast Fullwave Simulation Based on Parallel-Distributed HIE-FDTD Method2012

    • Author(s)
      Yuta Inoue and Hideki Asai
    • Organizer
      APMC2012
    • Place of Presentation
      高雄、(中華民国)
    • Year and Date
      2012-12-07
    • Related Report
      2012 Annual Research Report
  • [Presentation] 陽的かつ無条件安定な手法による電源分配回路網の高速過渡解析2012

    • Author(s)
      西崎統大, 開根惟敏, 浅井秀樹
    • Organizer
      デザインガイア2012
    • Place of Presentation
      九州大学百年講堂(福岡)
    • Year and Date
      2012-11-28
    • Related Report
      2012 Annual Research Report
  • [Presentation] 伝送線路特性のベクトルフィッティングによる有理関数近似と等価回路合成2012

    • Author(s)
      本多大介, 關根惟敏, 浅井秀樹
    • Organizer
      デザインガイア2012
    • Place of Presentation
      九州大学百年講堂(福岡)
    • Year and Date
      2012-11-28
    • Related Report
      2012 Annual Research Report
  • [Presentation] Nonlinear Block-Type Leapfrog Scheme for the Fast Simulation of Multiconductor Transmission Lines with Nonlinear Drivers and Terminations2012

    • Author(s)
      Tadatoshi Sekine and Hideki Asai
    • Organizer
      EPEPS2012
    • Place of Presentation
      Tempe, AZ, (USA)
    • Year and Date
      2012-10-22
    • Related Report
      2012 Annual Research Report
  • [Presentation] 次世代回路設計技術に向けた高速SI/PI/EMIシミュレータの開発2012

    • Author(s)
      井上雄太, 関根惟敏, 浅井秀樹
    • Organizer
      JIEP修善寺ワークショップ
    • Place of Presentation
      ラフォーレ修善寺(修善寺)
    • Year and Date
      2012-10-19
    • Related Report
      2012 Annual Research Report
  • [Presentation] Advanced PI/SI/EMI Simulation Techniques Based on Leapfrog Scheme2012

    • Author(s)
      Hideki Asai
    • Organizer
      EMC Europe 2012
    • Place of Presentation
      Rome, (Italy)(招待講演)
    • Year and Date
      2012-09-17
    • Related Report
      2012 Annual Research Report
  • [Presentation] Fast Transient Analysis of Multiconductor Transmission Lines Using Nodal Block Relaxation (NBR) Method2012

    • Author(s)
      Takahiro Takasaki, Tadatoshi Sekine, and Hideki Asai
    • Organizer
      ITC-CSCC2012
    • Place of Presentation
      札幌国際会議場(札幌)
    • Year and Date
      2012-07-17
    • Related Report
      2012 Annual Research Report
  • [Presentation] 節点ブロック緩和法を用いた多導体伝送線路の高速シミュレーション2012

    • Author(s)
      高崎貴大, 關根惟敏, 浅井秀樹
    • Organizer
      電子情報通信学会回路とシステム研究会
    • Place of Presentation
      京都リサーチパーク(京都)
    • Year and Date
      2012-07-03
    • Related Report
      2012 Annual Research Report
  • [Presentation] Macromodeling and Circuit Simulation of High-Speed Interconnects Based on Vector Fitting and Equivalent Circuit Synthesis2012

    • Author(s)
      Daisuke Honda, Tadatoshi Sekine, and Hideki Asai
    • Organizer
      NCSP2013
    • Place of Presentation
      Hawaii, HI, (USA)
    • Year and Date
      2012-03-06
    • Related Report
      2012 Annual Research Report

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Published: 2012-04-23   Modified: 2019-07-29  

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