Development of high-throughput modeling method for three-dimensional semiconductor-oxide interface
| Project/Area Number |
24310082
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Partial Multi-year Fund |
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| Section | 一般 |
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| Research Field |
Nanostructural science
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| Research Institution | Waseda University |
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Principal Investigator |
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| Project Period (FY) |
2012-04-01 – 2015-03-31
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| Project Status |
Completed (Fiscal Year 2014)
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| Budget Amount *help |
¥20,410,000 (Direct Cost: ¥15,700,000、Indirect Cost: ¥4,710,000)
Fiscal Year 2014: ¥3,640,000 (Direct Cost: ¥2,800,000、Indirect Cost: ¥840,000)
Fiscal Year 2013: ¥4,680,000 (Direct Cost: ¥3,600,000、Indirect Cost: ¥1,080,000)
Fiscal Year 2012: ¥12,090,000 (Direct Cost: ¥9,300,000、Indirect Cost: ¥2,790,000)
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| Keywords | 表面・界面ナノ科学 / シリコン / 絶縁膜 / 分子動力学法 |
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| Outline of Final Research Achievements |
An automated and high-throughput atomistic model generator has been developed, targeting three-dimensional oxide/semiconductor interface structures. This work is aiming to build a foundation of the researches and developments of the rapidly emerging three-dimensional electronic devices. It can provide realistic atomistic models for various electric and thermal transport simulations. As an example, the thermal conductivity of a silicon nanowire has been studied, and the origin of the peculiar thermal property has been clarified.
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Report
(4 results)
Research Products
(70 results)
