Low Power/delay Radiation-hardended Flip-flop in a FD-SOI proess
| Project/Area Number |
26889037
|
|---|
| Research Category |
Grant-in-Aid for Research Activity Start-up
|
| Allocation Type | Single-year Grants |
|---|
| Research Field |
Electron device/Electronic equipment
|
|---|
| Research Institution | Kyoto Institute of Technology |
|---|
Principal Investigator |
furuta jun 京都工芸繊維大学, グリーンイノベーションセンター, 特任助教 (30735767)
|
|---|
| Project Period (FY) |
2014-08-29 – 2016-03-31
|
| Project Status |
Completed (Fiscal Year 2015)
|
| Budget Amount *help |
¥2,730,000 (Direct Cost: ¥2,100,000、Indirect Cost: ¥630,000)
Fiscal Year 2015: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2014: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
|
|---|
| Keywords | ソフトエラー / 中性子 / 重イオン / フリップフロップ / FD-SOI / 完全空乏型トランジスタ |
|---|
| Outline of Final Research Achievements |
We propose SLCCFF which is a radiation hardened non-redundant flip-flop for an SOI process. The SLCCFF has the stacked structure to prevent soft errors on SOI processes while maintaining smaller delay and power overhead than conventional stacked FFs. Energy delay product of SLCCFF is 86% of the stacked FF. We fabricate test chip in a 65 nm thin BOX FD-SOI process and measured soft error rates of SLCCFF, stacked FF and standard DFF by neutron irradiation and α particles. Experimental results show that the SLCCFF is about 27x stronger than the standard DFF at 0.4V power supply in the SOTB process. It is about 1080x stronger compared with the standard DFF in the bulk process.
|
Report
(3 results)
Research Products
(9 results)
