| 研究課題/領域番号 |
22K11965
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| 研究種目 |
基盤研究(C)
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| 配分区分 | 基金 |
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| 応募区分 | 一般 |
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| 審査区分 |
小区分60040:計算機システム関連
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| 研究機関 | 有明工業高等専門学校 |
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研究代表者 |
Gauthier Lovic 有明工業高等専門学校, 創造工学科, 教授 (90535717)
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| 研究分担者 |
石川 洋平 有明工業高等専門学校, 創造工学科, 准教授 (50435476)
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| 研究期間 (年度) |
2022-04-01 – 2027-03-31
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| 研究課題ステータス |
交付 (2023年度)
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| 配分額 *注記 |
3,900千円 (直接経費: 3,000千円、間接経費: 900千円)
2026年度: 520千円 (直接経費: 400千円、間接経費: 120千円)
2025年度: 910千円 (直接経費: 700千円、間接経費: 210千円)
2024年度: 650千円 (直接経費: 500千円、間接経費: 150千円)
2023年度: 650千円 (直接経費: 500千円、間接経費: 150千円)
2022年度: 1,170千円 (直接経費: 900千円、間接経費: 270千円)
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| キーワード | EDA / HDL / High-Level Synthesis / HW/SW Co-Design / HW/SW Co-Simulation / Ruby Language / C Language / Graphical User Interface / RTL simulation / エッジ・コンピューティング / ハードウェ・ソフトウェアシステム / ハードウェア・ソフトウェア・コードサイン / ハードウェア・ソフトウェア記述言語 |
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| 研究開始時の研究の概要 |
With this research, we will devise a Hardware (HW)/Software (SW) platform for sustainable never-die edge computing based on the HDLRuby language. For that purpose, we will first need to integrate this HW description language with SW programming. Then the platform will be implemented using this language. It will provide a library of HW and SW fine grain modules implementing functions commonly used in edge computing, and a HW/SW runtime for ensuring the never-die and sustainable properties.
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| 研究実績の概要 |
This year, we finalized a new construct for describing hardware using structured programming code. We compared this construct with a commercial high-level synthesis tool and published the results, showing faster hardware with similar design effort.
Furthermore, we added the ability to integrate C and Ruby programs within HDLRuby hardware descriptions for co-simulation and co-design. The fully functional co-simulation engine was demonstrated with a UART keyboard and CRT display emulators.
Finally, to improve HDLRuby's accessibility, especially for students, we added two web-based graphical interfaces: one for visualizing simulation results and one for emulating an evaluation board interface (buttons, LEDs, oscilloscopes, etc.), accessible through a web browser during simulation.
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| 現在までの達成度 (区分) |
現在までの達成度 (区分)
2: おおむね順調に進展している
理由
In this research, we propose a hardware-software platform for sustainable edge-computing devices based on HDLRuby. We merged hardware and software within HDLRuby by adding a sequencer construct for describing hardware with software-like code and enabling software modules (in Ruby or C) within an HDLRuby description for co-design and co-simulation.
Future improvements currently in design phase, include introducing iterators and Ruby-like constructs for the sequencer and shared signals for abstracting communication protocols.
However, HDLRuby's industry adoption may be hindered if it cannot support proprietary IP libraries. Supporting external Verilog HDL or VHDL modules in HDLRuby would address this. Currently, HDLRuby can convert to these languages, but the reverse is not possible.
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| 今後の研究の推進方策 |
In terms of implementation, we plan to finalize the iterators and shared signals for higher-level software-like hardware descriptions and support the input of Verilog HDL files in the HDLRuby framework for co-simulation and co-design. We will also attempt to add support for dynamic reconfiguration, although it may be a less essential part of the project than initially thought.
So far, the majority of the chips described in HDLRuby have been physically implemented on FPGA boards. Therefore, we now plan to design an ASIC in HDLRuby and proceed to its physical implementation.
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