| 研究課題/領域番号 |
22K14260
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| 研究種目 |
若手研究
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| 配分区分 | 基金 |
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| 審査区分 |
小区分21020:通信工学関連
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| 研究機関 | 九州大学 |
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研究代表者 |
BARAKAT ADEL 九州大学, システム情報科学研究院, 助教 (20792039)
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| 研究期間 (年度) |
2022-04-01 – 2025-03-31
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| 研究課題ステータス |
交付 (2023年度)
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| 配分額 *注記 |
4,420千円 (直接経費: 3,400千円、間接経費: 1,020千円)
2024年度: 780千円 (直接経費: 600千円、間接経費: 180千円)
2023年度: 1,950千円 (直接経費: 1,500千円、間接経費: 450千円)
2022年度: 1,690千円 (直接経費: 1,300千円、間接経費: 390千円)
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| キーワード | Metamateria / wireless power transfer / wireless data transfer / Clock and data recovery / Efficiency / low power consumption / Metamaterial / Efficienct oscillator / wireless power and data / biocompatibility / biomedical implant / stacked metamaterial / free running oscillator |
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| 研究開始時の研究の概要 |
A general wireless power and data transfer (WPDT) system employs two modules, which results in a large size. Also, the use of a fixed frequency oscillator makes the performance of the WPDT system dependent on the separation between the transmitter (TX) and receiver (RX). In this research, a free-running oscillator that uses stacked metamaterial as its resonator is proposed such that the system has TX/RX separation independent operation. Also, data is transmitted by modulating the current source of this oscillator.
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| 研究実績の概要 |
The purpose of this research is the implementation of a metamaterial-assisted wireless power and data transfer (WPDT) system over a single channel to compact biomedical implants. Also, this WPDT system features 1- a free running oscillator for dynamic transfer, and 2-a clock and data recovery circuit in CMOS technology with low power consumption.
In this ficial year (FY2023), final prototypes of the metamaterial-assisted free running oscillator and its characterization have been completed. Results has been drafted and submitted to an international Q1 journal.
Finally, under the topic of clock and data recovery, a presentation has been has been done at an international conference. Moreover, a paper has been published on a highly impacted Q1 journal (IEEE-TAP).
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| 現在までの達成度 (区分) |
現在までの達成度 (区分)
1: 当初の計画以上に進展している
理由
The planned test in phantom model has been performed early before and the results is submitted for review in an international journal.
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| 今後の研究の推進方策 |
In FY2024, a new chip will be fabricated for the clock and data recovery circuit with lower power consumption. The obtained results will be summarized and published.
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