今後の研究の推進方策 |
1. Performance enhancement by back biasing Recently, I have found the performance enhancement effect by back biasing. Therefore, The physical mechanism of the performance enhancement of TFET by the back biasing will be investigated and such effect will be used for further performance improvement.
2. Scaling the device size and EOT minimizing Scaling the device size and EOT for maximizing device performances. Modification of the device structure and realization of high performance TFET with steep SS below 60 mV/dec and high Ion/Ioff ratio, comparable with that of advanced CMOS.
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