| 研究課題/領域番号 |
15K18067
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| 研究機関 | 九州工業大学 |
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研究代表者 |
レオナルドジュニア ラナンテ 九州工業大学, 大学院情報工学研究院, 助教 (10649833)
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| 研究期間 (年度) |
2015-04-01 – 2018-03-31
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| キーワード | OFDMA / random access / IEEE 802.11ax |
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| 研究実績の概要 |
For the Fiscal Year 2016, our research activity was composed of 1: Architecture design of the uplink multi-user MAC, 2. MAC Implementation optimization and 3. Publication of research results. The project focused more on producing novel efficient methods for implementation of the uplink MAC hence some of the optional work such as Enterprise architecture modeling was deprecated. Most of the work was done in Matlab which includes verification of design and algorithm.
Because of the above change,the project was able to publish 6 papers for 2016 including one journal paper,4 international conference papers and 1 technical report.The journal paper proposes various analysis and optimization methods to ensure high efficiency uplink MAC implementation. The conference papers on the other hand details the protocol design that is currently implemented in hardware. The technical report features a related research work to improve the efficiency of the downlink transmission.
In addition, we made 3 contributions in IEEE 802.11ax with one that has an accepted motion to be included in the draft standard. The contributions are followups to the last year's proposal about random access OFDMA.Specifically, we proposed methods to increase the transmission efficiency of unassociated STAs using random access OFDMA.
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| 現在までの達成度 (区分) |
現在までの達成度 (区分)
2: おおむね順調に進展している
理由
The project is progressing rather smoothly. In order to ensure that the completed design will work when experimental testing is started, elaborate analysis and simulations were done in fiscal year 2016 prior to actual experimental testing. The RTL implementation is currently ongoing and should be ready by the start of experimental testing.The project will be tested using the FPGA board purchased in fiscal year 2016.
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| 今後の研究の推進方策 |
The 802.11ax draft 2.0 will be published on September 2017 which should include most of the needed details. This would give us enough time to update the algorithm and hardware design. The remaining research work includes experimental verification in FPGA, complexity reduction and publishing of the remainder of the research results.
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| 次年度使用額が生じた理由 |
The journal paper that was submitted took longer time than expected (It will be published on July 2017). Hence the money allotted for publication fees was not used.
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| 次年度使用額の使用計画 |
The remaining 108,208yen will be used to pay the publication fee for the journal paper publication fees.
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